parallel bus 中文意思是什麼
parallel bus
解釋
並聯總線-
As a new interface caters for rapid development of computer peripheral equipment, universal serial bus ( for short usb ) dispels astriction of communication through traditional serial port and parallel port. it is very suitable for real time image data transmission, which requires high speed. this theme describes two - circuit systems, which utilize usb interface to data from a digital image sensor to pc
為了迎合計算機上設的快速發展以及消除計算機外設通過串、並口的通訊的局限性，出現了新的計算機外設介面usb （通用串列總線） ，這種新型介面對于實時的視頻傳輸很適用，本文設計了兩套電腦眼基於ez - usb2131q的usb介面系統。 -
Then the paper uses the same typical four network operating conditions as the primary given conditions and when adding one set of the parallel capacitor bank, changing the 330 / 220kv transformer tap changer position step by step to change the transformer ration, through this study methods this paper found out all the optimized combination of the tap changer position and the amount of input reactive power, also obtained four sets of the 330kv, 220kv and hokv s / s bus voltage and the active and reactive power losses changing curves. through analyzing the optimized combination control curve and the network power flow, the paper generalizes the rules as following : the chief measure of coordinative control is inputting shunt reactor in chengxian s / s in winter time both in the planning year of 2010 & 2005 ; in summer time in planning year of 2010 the chief measure is to input proper shunt capacitor
本研究通過分析所獲得的最優綜合控制組合曲線及電網潮流，總結出了如下規則：隴南電網在2005年及2010年冬大、以及2005年夏小運行方式下，綜合控制應以成縣變投入適量並聯補償電抗器作為主要措施；在2010年夏小運行方式下則投入適量並聯補償電容器作為主要措施，再輔助以選擇合適的主變有載調壓分接頭來調節，達到控制網內無功潮流分佈合理、各變電站母線電壓在理想的范圍內時電網有功損耗最小，從而也提高了電網安全運行水平及供電質量。 -
The result shows that, when the full - bridge power converter is joined with boost / buck dc chopper in parallel, it can serve a dc voltage of over 340v and a power of 800w, meanwhile, as output voltage of the fuel cells changes due to loadings, the sliding - mode controller can cause more rapid responses and robustness to the dc bus voltage source
實驗結果顯示，本論文之全橋式功率轉換器與升壓/降壓直流截波器並聯供電時，輸出電壓可達340v以上，輸出功率約為800w ，同時，當燃料電池之輸出電壓因負載而改變時，本論文所提出之滑動模式控制器能使直流鏈電壓具有較快速的響應及強健性。 -
North bridge is the center of communication with many high - speed buses and connects cpu, sdram, apg equipment and pci equipment. south bridge is connected to north bridge with pci bus, it has many low speed buses, such as isa, ide, usb, floppy disk, p / s2, serial port, parallel port. with its characteristic, this system has two million ethernet interfaces and one watch - control module
其中，北橋是整個系統的核心通信部分，含有豐富的高速總線介面，連接了cpu 、 sdram 、 agp設備和pci設備；南橋和北橋通過pci總線互聯，它引出的總線一般速率比較慢，如isa 、 ide 、 usb 、 floppydisk 、 p s2 、串口、並口等。 -
This thesis totally discusses the principles on which bus - plugin styled software works, and probes into the technical methods to design and develop applications. then the author gives some rules and advices for practical works. the solutions of processing multi - plugin and multi - data - object and parallel - calling plugins are analysed with object - oriented method in detail. asynchronous plugin service and plugin thread methods that based on windows system and vc + + 6. 0 platform are introduced as a new architectural method, bus - plugin styled technology can be widely employed in many fields
詳細地對插件式應用程序的設計思想，開發中的原則、建議、技術方法以及可行性進行了細致深入的分析。並結合面向對象的方法，研究了總線插件式應用系統中多插件、多數據對象流處理，插件的并行性等的實現。基於windows插件操作系統和vc 6 . 0開發平臺，文中給出了異步插件服務調用和同步插件線程來實現插件并行的方法。 -
Peripheral devices in embedded systems are often connected to the mcu as memory - mapped i / o devices, using the microcontroller ' s parallel address and data bus. this results in lots of wiring on the pcb ' s to route the address and data lines, not to mention a number of address decoders and glue logic to connect everything
由於并行總線擴展時連線過多，外圍器件工作方式各異，外圍器件與數據存儲器混合編址等，都給單片機應用系統設計帶來布線復雜，線路板面積大，易引起emi和esd干擾等困難，這在一些比較復雜的應用系統是難以接受的。 -
Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function
本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。 -
At present, the interface mode of many lcm ( lcd module ) products is bus interface mode, which can be divided into serial peripheral interface and parallel peripheral interface
目前， lcd模組常用的工作方式有總線介面模式，分為串列和并行兩種方式，使用靜態畫面來測試顯示品質。 -
Bus structures, serial vs. parallel
串列對平行匯流排結構 -
After analyzing the characteristic of the parallel processing system, some problems about design missile - carrying processing system are pointed out ; network in the parallel processing system has become bottleneck and affect the performance of system, so the processing efficiency is analyzed in a multiprocessor system based on cluster - bus and some rules in designing the network in the multiprocessor system are brought out ; genetic algorithm is used for scheduling in the multiprocessor system, and a scheduling algorithm is described to suit arbitrary number of tasks, unequal task processing time, arbitrary precedence relation among tasks and arbitrary number of parallel processor, so that the schedule length will be minimized ; finally, an atr algorithm is mapped to a ring multiprocessor system, and a block diagram using dsp device is constructed. in chapter 4, the study is performed on real - time system hardware realization of atr. tms320c80 is selected as the kernel processor in multiprocessor system
為此，對一種由常用的dsp晶元組成的多處理器系統的處理器利用率進行了分析，提出了多處理器系統互連網路設計的基本原則；本章使用遺傳演算法作為實現多處理器調度的工具，提出了一種新的任務調度演算法，該演算法主要是為了解決在任務數任意、任務計算時間不相等、任務前趨關系任意、以及任務間存在通信和考慮任務存貯器要求的情況下，如何優化任務在各個處理器上的分配和執行順序，使得多處理器系統總的執行時間最小；最後對一個目標識別演算法進行了硬體實現優化分析，根據分析結果，將演算法映射到由dsp晶元組成的環形網路連接的處理器拓撲結構上，得到了多處理器系統的原理框圖。 -
For example, whether the fares offered by other public transport services of parallel routes are more attractive than the existing fares of the relevant bus service, and whether the introduction of section fares could enhance the competitiveness of the bus service
例如其他相類公共交通服務的收費水平是否比有關巴士服務的現有收費水平吸引，增設分段收費是否可以增加有關巴士服務的競爭力。 -
Serial vs parallel bus structures
串列對并行總線結構 -
The hardware of the controller use the hierarchical and modular designing ideas. it adopt parallel bus structure and the functional module can be expanded freely by the parallel bus
機器人控制器硬體部分按照層次化、模塊化的思想設計，採用并行總線結構，可以按照需求擴展各個功能模塊。 -
The part of control card development mainly consists of the definition and completion of parallel bus inside the cards container, the assignation of address, the applications of gal devices and the program and debugging of eprom software
控制卡研製部分的主要內容包括并行機箱內總線的定義與控制，系統尋址空間分配， gal器件應用，控制卡eprom程序設計等。 -
The data transfer capacity ( in bits per second ) of a bit - parallel bus
每條位并行總線上可傳輸數據的容量，用比特秒表示。 -
M industrial automation systems and integration - multiprocessor control system for industrial machines - part 1 : parallel bus
工業自動化系統和集成.工業機械用多處理器控制系統 -
It is provided with function of others computer system ' s communication through parallel bus, and the types of output dataclass are defined
系統採用并行數據通信總線實現與計算機系統通信的功能，並對通信的輸出數據類型進行了定義。 -
Via communication module, tesys model u can be connected with automation system conveniently through parallel bus, modbus or as - i bus etc., offering the most accurate and real - time monitoring and control
利用通信模塊， tesysu電動機起動器可以通過并行總線、 modbus總線和as - i總線等方便的與自動化系統相連，提供對設備最為實時和準確的監控； -
Using pxi such a standard parallel bus interface to replace the non - standard process control data communication interface and using the software platform labwindows / cvi designed to pxi bus modules and other virtual instrumentation to replace the different kinds of configuration software make communication interface and software platform integrated
用pxi這種標準的通用線介面取代該過程式控制制實驗裝置的數據通訊介面，用labwindows / cvi這種針對pxi總線模塊儀器等虛擬儀器設計的軟體開發平臺取代其組態軟體，提高了系統的精度及其穩定性和靈活性。 -
In the process of designing hardware, the principal and subordinate structure is adopted : the principal cpu accomplishes the communication with the group host computer ; the subordinate cpus accomplish the communication with some command post computers and observe post computers ; the principal and subordinate cpus exchange data through parallel bus to realize the communication between the group host computer and its subordinate computers
在硬體系統設計中，採用了主從結構：主cpu完成與群主機通信，從cpu完成與各指揮所、觀察所計算機通信，再通過主從cpu間并行總線的數據交換來完成群主機與其下屬計算機的通信。
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