silicon substrate 中文意思是什麼
silicon substrate
解釋
硅襯底-
Among various fabrication techniques of thin film, the sol - gel process has gained much interest for the preparation of pzt thin film, due to ihe advantages of good homogeneity, easy control of composition, low in - ill i reaving temperature, easy formation of large area thin films pb ( zrxti : - k ) 0 :, ( pzt ) films were prepared on the ito coated glass plates and low resistor silicon wafer in sol - gel dip - coating process associated wi di heat treatment : at different temperatures and characterized by x - ray diffraction ( xrd ) and transmission electron microscopy ( tem ). lt is shown that the pzt ferroelectric thin films with ( 110 ) preferred orientation and well - crystallized perovskite structure can be obtained after annealing at 680 ? for 30 minutes on ito substrate and at 800 " c for lornin on silicon substrate
Pzt的制備方法有很多，其中溶膠?凝膠（ sol - gel ）方法可以和集成電路（ ic ）光刻工藝相互兼容，處理溫度低，有大面積塗敷性能，能精確地控制組分，無需復雜的真空設備，成本低廉，所以對于集成鐵電薄膜電容的應用這種方法有很廣闊的前景。本文利用sol - gel技術在摻錫的in _ 2o _ 3透明導電薄膜（ ito ）襯底和低阻硅襯底上成功地制備了pzt鐵電薄膜。運用了x射線衍射， sawyer - tower電路和lcr電橋分別對薄膜的晶化溫度，結構和電學性能進行了測試。 -
Research progress of heterostructures of lead zirconate - titanate thin films on silicon substrate
硅基鋯鈦酸鉛鐵電薄膜異質結構的研究進展 -
( 1 ) silicon substrate was pretreated by diamond abrasive ; ( 2 ) silicon substrate was pretreated by seeding of suspending diamond slurry ; ( 3 ) silicon substrate was pretreated by diamond abrasive and seeding of suspending diamond slurry
金剛石研磨劑研磨基片；金剛石超微粉懸濁液對基片引晶處理；金剛石研磨劑研磨和金剛石懸濁液引晶復合處理方式。 -
1 successively depositing cbn thin films on si substrates which reaches international advanced level, the impact of negative substrate bias voltage and rf powers on the formation of cbn thin films were studied. boron nitride ( bn ) films were deposited on ( 100 ) - oriented p - type silicon substrate ( 8i sqcm ) with rf sputtering system. the target was hexagonal boron nitride ( hbn ) of 4n purity, and the working gas was the mixture of nitrogen and argon
研究了襯底負偏壓和射頻功率對制備立方氮化硼薄膜的影響立方氮化硼薄膜沉積在p型si （ 100 ） （ 8 15 cm ）襯底上，靶材為h - bn靶（純度達99 . 99 ） ，濺射氣體為氬氣和氮氣混合而成，制樣過程中，襯底加直流負偏壓。 -
Sige simox : oxygen ions with high dose were implanted into sige grown directly on silicon substrate for the first time, and sige - oi novel structure was formed successfully with additional high temperature annealing ; it has been confirmed that oxygen implantation with 45kev, 3 1017cm - 2 and annealing at 12500c in ar + 5 % o2 for 5 hours, are fit for the formation of sige - oi structure ; ge loss during the high temperature annealing has been observed, which is originated from ge volatility and ge diffusion ; it has been proposed to use nanoporous layer induced by h + / he + implantation to surppress ge diffusion and to use surface oxidation to overcome the upper limit of sige simox. sige smart - cut : hydrogen ions were implanted into sige material and followed by high temperature process ( 4000c to 7000c ) ; blistering study was done and suggested the possibility of sige layer transfer by smart - cut technology ; it is concluded that the bubble formation is easier in sige than in si, and the strain in sige / si and the difference of binding energy in sige and in si could possibly contribute to this effect. behavior of sige / si implanted with hydrogen : gave a detailed study on sige implanted by beamline or phi hydrogen implantation ; it has been found that great strain is introduced into sige by hydrogen implantation and this strain could be alleviated by high temperature annealing ; both for conditional beamline implantation and piii hydrogen implantation, 600 is appropriate for the post - implantation treatment
Sige - simox工藝方面：首次採用硅（ 100 ）襯底上直接外延的100nm厚sige的樣品中注入高劑量的o離子，通過退火處理成功制備了sige - oi新結構，即sige - simox工藝，證實了以45kev注入3 10 ~ （ 17 ） 7cm ~ （ - 2 ）劑量的氧離子，隨后在氧化層的保護下經1250 ， ar + 5 o _ 2氣氛的高溫退火（ 5小時）過程，可以制備出sige - oi新型材料；實驗中觀察到退火過程中的ge損失現象，分析了其原因是ge揮發（ ge通過表面氧化層以geo揮發性物質的形式進入退火氣氛）和ge擴散（ ge穿過離子注入形成的氧化埋層而進入si襯底中） ，其中ge擴散是主要原因；根據實驗結果及實驗中出現的問題，對下一步工作提出兩個改進的方案：一是通過在si襯底中注入適量h ~ + / he ~ +形成納米孔層來阻斷ge擴散通路，二是可以通過控製表面氧化來調節安止額士淤丈撈要表面sige層中的ge組分，從而部分解決sige -
The bst thin film grown on porous silicon substrate has been investigated for the first time. experiment results indicate that the porosity of porous silic
探索碩究了用脈沖檄光沉積的方法在多孔硅襯底上制備bst薄膜。 -
An array of non - aligned monocrystalline zinc oxide nanowires zno nws is fabricated on a silicon substrate by thermal evaporation
使用熱蒸發的方法在硅基底上制備了非定向氧化鋅zno單晶納米線陣列。 -
In this dissertation, high quality ( 002 ) textured zno films were prepared on silicon substrate using electron beam evaporation method. in addition, zno nano - particle material embedded into mgo thin films was prepared by a co - evaporation ( thermal and electron beam evaporation, simultaneously ) method and a following post - annealing process in oxygen ambient
本文介紹了採用電子束蒸發方法在si襯底表面上制備出了具有c軸擇優取向的高質量氧化鋅薄膜材料，另外，還採用共蒸發（通過電子束蒸發與熱蒸發同時進行）及後退火的簡單方法制備出包埋到介電物質mgo薄膜中的zno量子點材料。 -
The correlation between the calculated electron energy in the oxide and the electric field in the silicon substrate indicates that the difference between hot electron injection and the fn tunneling can be explained in terms of the average electron energy in the oxide
通過計算注入到氧化層中的電子能量和硅襯底的電場的關系表明，熱電子注入和fn隧穿的不同可以用氧化層中電子的平均能量來解釋。 -
Many approaches have been proposed to achieve better rf / microwave performance of passive elements on low - r si substrates. the use of high - resistivity ( > 3000q. c / ? silicon substrate is suggested to mimic the low - loss semi - insulating gaas substrate, but this is an uncommon option for current silicon substrate
然而，由於低阻硅襯底的高頻損耗，在射頻微波應用中，要在低阻硅襯底上實現高q值的無源器件，尤其是電感，是相當困難的。 -
Using the microwave selective heating property for materials, by setup equivalent equation, and first time inducing the electromagnetic field perturbation theory to the design of heating materials for substrate in mpcvd, three temperature distribution modes were established, including temperature distribution comprehensive mode of inhomogeneous plasma, temperature distribution composite mode of composite substrate materials, temperature distribution perturbation mode of composite materials, which ii provided an whole new technology route to the design of substrate heating system in mpcvd and guided the preparation of heating materials for substrate. and then the heating materials for substrate were designed and optimized to obtain large area homogeneous temperature distribution even larger than substrate holder ' s diameter. as an important part, this thesis researched the nucleation and growth of diamond films in mpcvd, systematically researched the effects of substrate pretreatment, methane concentration, deposition pressure and substrate temperature etc experimental technologic parameters on diamond films " quality on ( 100 ) single crystal silicon substrate in the process of mpcvd, characterized the films qualities in laser raman spectra ( raman ), x - ray diffraction ( xrd ), scanning electron microscopy ( sem ), infrared transmission spectra ( ir ), atomic force microscopy ( afm ), determined the optimum parameters for mpcvd high quality diamond in the mpcvd - 4 mode system
該系統可通過沉積參數的精確控制，以控制沉積過程，減少金剛石膜生長過程中的缺陷，並採用光纖光譜儀檢測分析等離子體的可見光光譜以監測微波等離體化學氣相沉積過程；利用微波對材料的選擇加熱特性，通過構造等效方程，並首次將電磁場攝動理論引入到mpcvd的基片加熱材料的設計中，建立了非均勻等離子體溫度場綜合模型、復合介質基片材料的復合溫度場模型及復合介質材料溫度場攝動模型，為mpcvd的基片加熱系統設計提供了一條全新的技術路線以指導基片加熱材料的制備，並對基片加熱材料進行了設計和優選，以獲取大面積均勻的溫度場區，甚至獲得大於基片臺尺寸的均勻溫度區；作為研究重點之一，開展了微波等離體化學氣相沉積金剛石的成核與生長研究，系統地研究了在（ 100 ）單晶硅基片上mpcvd沉積金剛石膜的實驗過程中，基片預處理、甲烷濃度、沉積氣壓、基體溫度等不同實驗工藝參數對金剛石薄膜質量的影響，分別用raman光譜、 x射線衍射（ xrd ） 、掃描電鏡（ sem ） 、紅外透射光譜（ ir ） 、原子力顯微鏡（ afm ）對薄膜進行了表徵，確立了該系統上mpcvd金剛石膜的最佳的實驗工藝參數。 -
In the new structure, a n + buffer layer is introduced into the bulk silicon substrate with a triple - diffusion process. the new structure has two features : one is the feature of npt - igbt : the thin and lightly - doped p + layer and the high lifetimes of the carriers ; the other is the feature of pt - igbt : n7n + structure which can make the n " region very thin
新結構用三重擴散的方法在n ~ -單晶片上引入了n ~ +緩沖層，仍然保留了npt - igbt中薄而輕摻雜p層和高載流子壽命的本質優點，同時又具有pt - igbt中n ~ - （ n ~ + ）雙層復合的薄耐壓層（即薄基區）的優點。 -
The second harmonic produced by a q - switched nd : yag laser with wavelength e = 532 nanometers ( nm ), pulse width 0 nanoseconds ( ns ) and repetition frequency i = 1 hz was used to bombard a highly pure solid hexagonal bn ( h - bn ) target ( 96 % ), with diameter of 2cm. in a vacuum chamber, boron nitride ( bn ) film was deposited on the single - crystal silicon substrate
利用高能脈沖激光（波長= 532nm ，頻率= 1赫茲，脈寬= 10納秒）在常溫下轟擊燒結的高純六方氮化硼（ h - bn ）靶，在真空反應室中將bn薄膜沉積在單晶硅基底上。 -
The demand of the wafer ' s quality become higher too. the result of the final polishing determines the quality of silicon substrate for the final polishing is the last step in the polishing. in this paper, the mechanism and dynamics process of silicon polishing are systematically analyzed
隨著集成電路向著甚大規模集成電路（ ulsi ）日新月異的發展，作為襯底材料的硅單晶片的尺寸越來越大，特徵尺寸也不斷減小，對硅襯底拋光片的拋光質量的要求也越來越高。 -
V groove silicon substrate
型槽硅襯底 -
These results provide important information for the epitaxy on porous silicon substrate and luminescence study of porous silicon
研究結果為多孔硅襯底上材料的生長和光學性能的研究提供了良好的實驗依據。 -
To date, most research on cmos rf circuits is focused on cmos rf front - end including some key building blocks such as low - noise amplifier ( lna ), mixer, bandpass filters, voltage control oscillators and power amplifiers. in si rf 1c, inductors need be realized on a silicon substrate along with all of the other devices in a single chip. in fact, the need for high q integrated inductors in rfics is increasing
在無線通信技術對cmos射頻集成電路需求的大背景下，本論文在大量深入調研的基礎上，圍繞射頻集成電路中必不可少的、有多種應用的無源器件?硅集成電感及其相關的cmos射頻集成單元電路，先後在上海冶金所微電子分部工藝線上及利用上海市科委的多目標晶元項目（ mpw ）在無錫華晶上華半導體有限公司進行了大量的實驗研究，得到了一些新的結果。 -
V - class thermistor film is successfully produced on silicon substrate and sio2 substrate applying cvd process for the first time in this paper, whose minimum thickness is only 600nm or so
本論文創沃性地採用十導體cvd工藝在硅中晶1底以及引；襯底1二if長出最小厚度為600urn的v系熱敏電阻薄臟。 -
Doing so lowers the capacitance ( the ability to store electrical charge ) between parts of the transistors and the underlying silicon substrate, capacitance that would otherwise sap speed and waste power
這麼做可以降低部份電晶體與底下矽基板之間的電容（即儲存電荷的能力） ，電容是速度降低及功率損耗的原因之一。 -
Researchers have used the technique to write lines with widths of only a few nanometers in a layer of photoresist on a silicon substrate
研究人員曾使用這種技術，在矽基座上的光阻層畫出寬度只有幾奈米的線。
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