standard-processing mode 中文意思是什麼

standard-processing mode 解釋
標準加工方式
  • standard : n 1 標準，水準，規格，模範。2 旗；軍旗，隊旗；【徽章】標幟，標記；旗標，象徵。3 【植物；植物學】...
  • mode : n 1 法，樣，方法，方式。2 模，型；樣式，體裁，款式；習慣。3 風尚；〈the mode〉流行，時髦。4 【語...
  1. According to experimental data and related standard, the finite element model of frame has been set based on its geometric model through simplified processing, selecting element, dividing mesh grids, load cases setting and putting characteristic etc. on the basis of this, the integrated finite element model of motorcycle has been established including frame, engine, suspension, wheel, rider and oil box etc. to understand the relationship and dynamic property of frame and integrated motorcycle, mode analysis and frequency response analysis have been done

    根據實驗測試數據和有關標準規范，以總體設計階段得出的車架幾何模型為基礎，通過模型簡化、單元類型確定、網格劃分、工況設置、邊界處理、物理特性賦予等，建立車架的有限元模型。並基於此，建立整車的有限元模型，包括車架、發動機、懸架、輪胎、乘員、油箱等。
  2. Digital image processing consume a large amount of memory and time commonly. basing on the advantage of fpga, the paper design harware module by hdl ( hardware language ), i. e., some function is achieved by les ( logic element ) of the fpga. the real - time of digital image processing is achieved by this. the sample and display of digital image is the important part. so, the paper mainly design the sample and desplay module. the sample card is designed and it ’ s word mode is configured according china ’ s cvbs ( composite video bar signal ). for acquiring the image and storing it correctly to sram, the paper design the sample - control module. the sample module can work correctly using least time. the reliability and real - time achieve the reference. according the vga principle and scheduling of the ths8134, the paper design a vga - control module by hdl. firstly, the control signal is synthesized secondly, the horirontal and vertical synchronization signals is synthesized according to the vga interface standard

    圖像處理的特點是處理的數據量大，處理非常耗時，為實現數字圖像的實時處理，本文研究了在fpga上用硬體描述語言實現功能模塊的方法，通過功能模塊的硬體化，解決了視頻圖像處理的速度問題。圖像數據的正確採集和顯示輸出是其中的兩個重要的模塊，因此，本文主要完成了圖像數據的採集和顯示輸出的設計。本文設計了採集卡，並要對其工作模式進行了配置和編寫了採集控制模塊，在採集控制模塊的控制下，將數字圖像數據正確無誤的存儲到了sram中。
  3. Become a kind of new electronics circuit - current - mode circuit. it is replacing the traditional design method of the voltage - mode in the high frequency high - speed signal processing realm 。 this thesis mainly discussed the modified second - generation current conveyors based on the current - mode kinds of new cuicuit components, they are stronger modified standard current - mode parts in fuctions on this foundation. mainly including the modified differential difference current conveyor ( mddccii ) 、 the fully balanced second generation current conveyor ( fbccii ) 、 ( full balances ) four - terminal floating nullor ( fbftfn ) and the current differencing buffered amplifier ( cdba ), they are all function very strong standard current - mode parts, they all can provide some circuit functions of better than general operation amplifier, because they have the voltage importation and the current importation, therefore use it since can carry out the voltage - mode signal processing circuit expediently, can also carry out the current - mode signal processing circuit expediently, and have to increase the benefit bandwidth to accumulate more widely than the voltage - mode, but have their advantages more according to the current - mode filter of the modified current conveyor, because it constitutes in brief, the filter wave function is stronger and they are better than in general use operation amplifier of many advantages, be easy to composing for example 、 high speed 、 frequency bandwidth 、 the power supply voltage requests low 、 consume small, the impedance is different from etc. advantages, otherwise they have biggish dynamic range, and flexible circuit synthesize, so they are the best active parts

    從第二代電流傳輸器ccii入手，重點研究了以下幾種改進型的第二代電流傳輸器:改進的差動差分電流傳輸器mddccii 、全平衡第二代電流傳輸器fbccii 、多輸出四端浮地零器ftfn 、全平衡四端浮地零器fbftfn 、電流差分緩沖放大器cdba的電路結構及其模型。然後在此基礎上系統地研究了基於這幾種改進型的第二代電流傳輸器的濾波器的設計方法，主要方法和結果如下:利用mddccii設計了差分式連續時間電流模式低通、帶通濾波器;電流模式跳耦結構考爾低通濾波器;利用fbccii設計了帶通二階節濾波器及電流模式雙二階通用濾波器;設計了基於多輸出端ftfn的電流模式二階通用濾波器電路;通過數字化開關選擇的基於fbftfn的電流模式通用濾波器;設計了基於最少個數電流緩沖放大器（兩個cdba ）的多功能通用電流模式濾波器及其在非理想因素情況下分析。設計濾波器的主要方法是採用級聯設計、運算模擬（信號流圖法）和反饋設計（跳耦法） 。
  4. This approach needs one receiver with every antenna working in time - division mode, which uses the standard array signal processing algorithm to finding direction after recovering the multiple signals by interpolation

    此方法採用一個接收通道，各陣元以時分方式工作，採用插值的方法恢復出各路信號，然後運用陣列信號處理演算法進行測向。
  5. The message queue task fails to comply with federal information processing standard fips 140 - 2 when the computer s operating system is configured in fips mode and the task uses encryption

    如果將計算機的操作系統配置為fips模式，將禁用「消息隊列」任務以遵守聯邦信息處理標準（ fips ） 140 - 2 。
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