test vector 中文意思是什麼

test vector 解釋
測試向量
  • test : n 1 檢驗，檢查；考查；測驗；考試；考驗。2 檢驗用品；試金石；【化學】試藥；（判斷的）標準。3 【化...
  • vector : n 1 【數學】向量，矢量，動徑。2 【航空】飛機航線；航向指示。3 【天文學】幅，矢徑。4 【生物學】帶...
  1. In order to reduce time in this procedure, we realize a fast cyclization algorithm based on the hash table. experimental results show that this approach is efficient and automated in test vector translation

    實驗結果表明，在此波形格式基礎上的測試向量轉換，不僅在速度上得到提高，同時針對大容量的測試向量集合，也能獲得較高的壓縮結果。
  2. To test the p7 promoter activity, a series of constructs were obtained by cloning the different dna fragments into the luciferase gene reporter vector pgl3 - b. when the constructs were transiently transfected into thp - 1 cells, luciferase activity assay showed that the core region of p7 promoter located at - - 165 bp

    第一部分的工作首先通過對人acat - 1基因p7啟動子序列進行5 '和3 ' -端的缺失的詳細分析，結果顯示最大報告基因轉錄表達活性位於- 612 - 165bp區段。
  3. Lastly the above stiffness matrix, the nodal variables of which are the dual of stress functions, is replaced by a new one with simple displacements vector regarded as unknown. such finite element satisfies homogeneous equilibrium equations and can pass the patch test as long as the original plane elasticity element can pass the corresponding patch test

    所得到的板彎曲單元在單元內部滿足齊次平衡方程，並且只要原始平面彈性單元能通過常應變分片試驗則轉換得到的板單元一定能通過常曲率分片試驗。
  4. There are a lot of methods available to create test vector. the thesis addresses their characteristics of the methods and special structure of boundary scan circuit respectively and come to a conclusion of pseudo - exchausive testing the most rational method applied to this situation

    測試矢量的生成方法很多，本文在研究了各種方法的特性，以及邊界掃描電路的特殊結構后，採用了偽窮舉法生成測試矢量。
  5. At last, the paper involves the flow and related data of logic simulation, logic synthesis and test vector in the risc cpu

    論文最後給出了64位vegacpu的asic邏輯模擬文件和模擬波形，邏輯綜合策略、綜合腳本和綜合結果，以及vegacpu基於atpg的測試向量設計流程和相關數據。
  6. My main task is to generate test vector and design of an assembler

    筆者主要負責測試矢量的生成和匯編器設計。
  7. A circuit is designed to define the odd and even line to meet the layout ' s simplification requirement. to make full use of the system resource, an auto - test circuit is designed with test vector can be given through the internal bus and result vector can be detect by system

    為了充分利用了嵌入式晶元豐富的系統資源，設計了簡單實用的自測試電路，其測試向量和結果向量都可以通過總線被系統直接讀取，系統執行相應的指令就可以完成相應的自測試過程。
  8. Stil. standard test interface language for digital test vector data - core test language

    數字檢測矢量數據的標準測試介面語言
  9. The automatic test vector generation method based on fault simulation is described, and the whole procedure of atpg of sequential circuits is analyzed, fault simulator - hope as an example

    本文闡述了基於模擬的自動測試生成方法，以故障模擬器? hope為例分析了整個時序電路自動測試生成過程。
  10. Base on the existing synchronous sequential circuits fault simulator - hope, the test vector generation method of sequential circuits based on ant algorithm is systematically researched firstly

    本文在同步時序電路故障模擬器? hope的基礎上，率先對基於螞蟻演算法的時序電路測試矢量生成方法作了系統的開拓性研究。
  11. Using visual c + +, a board - level test vector generation and fault diagnoses software were designed and carried out

    在visualc + +環境下，設計並實現了板級測試矢量生成軟體和故障診斷軟體。
  12. Test vector generation based on ant algorithm is presented and implemented, the pheromone computation formula for sequential circuits and status transfer rules are given, and the test results are compared with the results of the other existing test generators - hitec, gatest, cris, digate and strategate, based on standard sequential circuits iscas ' 89 and other synchronous sequential circuits

    提出並實現了基於螞蟻演算法的測試矢量生成，給出了針對時序電路測試矢量生成的信息素計算公式和狀態轉移規則。在iscas 』 89標準時序電路和幾個同步時序電路上實現了測試生成，並將生成結果和其它現有測試生成器（ hitec ， gatest ， cris ， digate ， strategate ）的生成結果作了比較、分析。
  13. Using this model, we design and realize this test vector translation system based on the three - layer structure. this system includes application layer, application server layer, and data layer

    在該模型的基礎上，使用先進的三層結構的設計思想，將測試向量轉換系統分為應用層、應用服務層和數據中心層等三部分實現。
  14. Stil standard test interface language for digital test vector data

    數字試驗向量數據的標準試驗介面語言
  15. Aes implementation and the test vector generation in c language

    語言實現及測試向量生成
  16. On this basis, we realize a test vector translation system

    在此基礎上，設計並實現了一個測試向量轉換系統。
  17. Experimental results show that this format is efficient in test vector translation and algorithm reduces the test data storage

    2 .測試向量轉換中的波形數據格式及其壓縮編碼演算法研究。
  18. The test vector set of the circuit can be obtained through constructing a test bdd. compared with the traditional algorithms, this method avoids enormous backtracking process. the second application is the network reliability based on bdd

    Bdd應用於數字電路的固定型故障檢測，建立的故障節點的檢測bdd可以比較方便地得出電路故障的測試矢量，相比傳統的測試演算法，避免了龐大的反向回溯過程。
  19. But with the improvement of design and test technique, translating the test vector from the design to test system is becoming more and more difficult. so how to solve the difficulty efficiently is an important research direction. this dissertation studies the different test vector format languages and ic test program languages, introduces test development system architecture and components, discusses the key issues in practical application of test vector translation and gives the solutions

    本文研究了多種測試向量格式語言和測試程序語言，系統介紹了測試開發系統的體系結構以及各個組成部分，介紹了當今的測試開發系統方面的研究成果，詳細分析了在測試向量轉換系統中的測試向量周期化轉換的關鍵問題，並給出相應的解決方法及其演算法實現。
  20. Firstly, a primary conception on bst standard ieee1149. 1 was introduced. as to be groundwork, some applications about bst in board test, test process and test vector generation arithmetic were enforced

    在此基礎上，重點討論了邊界掃描技術在板級測試領域的相關應用，並對板級測試過程和矢量生成演算法進行了介紹。
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