time-delay circuit 中文意思是什麼
time-delay circuit
解釋
時延電路-
Reduce the load of access controller lower potential trouble nc no output, control all kinds of electric locks delay control circuit unlock delay time in 0 10s auto protection dimension : 180x77x77mm weight : 1410g
設nc no輸出，可控制各種類型的電鎖。設延時控制電路，開鎖時間可在0 - 10秒。 -
The system parameters are developed at the same time, and some universal conclusions on the theoretical analysis of pll are reached. then, we have carried on analysis and research to the theory of differential delay ring voltage controlled oscillator ( vco ). on this basis, a improved differential delay ring vco with more efficient loads is described. this circuit has been designed and implemented in 0. 35 m cmos technology
本文還對差分延遲結構環形壓控振蕩器電路進行了深入的分析與研究，並提出了一種基於高質量電阻電路的主從差分延遲結構環形壓控振蕩器，其採用了一種新型的主從差分延遲結構，並用一個更有效、更穩定的負載電阻電路結構來替代vco設計常使用的單個mos管電阻結構，使其系統穩定性有了相應提高。 -
The tripping device is basically divided into the instantaneous electromagnetic release and the time delay thermal release, which are used for protection of circuit from shortcircuit and overload respectively
斷路器由瞬時動作的電磁脫扣器和延時動作的熱脫扣器組成，分別用作線路的短路和過載保護。 -
Analyze item by item the position of unintact cycle, the running clearance of unintact cycle, locking - deform, datum dimension regulating, repeatly install, power voltage wave and marking running etc. at the same time, we give the calculating formula to calculating the running marking random error, and use it to calculate the system error of big diameter measure instrument - - datum dimension frame error, gyro - wheel diameter error, error caused by circumstance temperature, error caused by backing distance, angle error, delay error of data collecting circuit, lathe main shaft running error, workpiece install partial error
對不完整圓的位置、不完整圓的轉動間隙、鎖緊變形、基準尺調整、重復安裝、電源電壓波動、標記轉動等隨機誤差進行了逐項分析，並給出轉動標記隨機誤差的計算公式。對大直徑測量儀的系統誤差?基準尺尺架誤差、滾輪直徑誤差、環境溫度引起的誤差、後退距離引起的誤差、角度誤差、數據採集電路延時誤差、車床主軸回轉誤差、工件安裝偏心誤差分別進行了計算，最後對誤差進行合成。 -
The use of time delays on these vehicles helps to eliminate transmission and motor damage by providing even and controlled acceleration. the delay is adjustable between 0 to 5 seconds and can be wired independently of other delays or alternatively these delays can be wired in cascade so that it is necessary for the first delay to switch on before the following commences timing etc. suppression is included in the delay circuit to prevent damage by voltage transients
延遲開關可以調整延遲時間0 ~ 5秒，並可連接數個延遲開關來逐步控制連續動作之時間（復數連接時，第一個開關要啟動接下來的開關才會跟著動作）避免電動車起動初期之電力脈沖，達到平順的起步動作，可預防電壓無端變動造成之電路故障 -
The circuit is based on the conventional delay - superposition algorithm realized by the field programming gate array ( fpga ). the circuit makes it possible to deinterleave and track with pri in real time
本文還利用fpga對重頻跟蹤電路進行了設計，根據延遲重合法提出一種新的實現方案，由於不用進行首脈沖的確定，使得實時跟蹤成為可能。 -
The pulse width trigger circuit, trigger delay circuit are discussed. and a new kind of peak detection module which is implemented by verilog hdl in fpga and greatly enhances the performance of catching glitch is discussed in the dissertation. the waveform recorder function accomplished in the scopemeter can test, monitor slow analog signals and record the characteristic value of signals continuously for a long time
本文討論了脈寬觸發電路和觸發釋抑電路的實現，採用veriloghdl在fpga中實現了一種峰值檢測模塊，提高了示波表的毛刺捕捉能力，設計的波形記錄（ recorder ）功能模塊能夠對輸入的模擬信號進行長時間連續不斷的采樣量化，並記錄波形數據和及時送顯示。 -
Specifications : power input : standard 220vac, 50hz power output : standard 12vdc, 5a control electric locks or bolts directly. reduce the load of access controller lower potential trouble nc no output, control all kinds of electric locks delay control circuit unlock delay time in 0 10s auto protection dimension : 180x77x77mm weight : 1540g
功能特性：交流輸入：標準220vac ， 50hz直流輸出：空載輸出14vdc ，負載輸出12vdc ，標準輸出電流： 5a直接控制電鎖：可減小門禁控制器的負荷，節省工程布線，減少故障隱患。 -
It combines boolean algebra expression with time information to describe behavior of a digital circuit. it has made substantive progress at path sensitization, power dissipation estimation, iddt and delay fault diagnosis. theoretically, it is necessary to establish some mathematical foundation in order to define distance, limit and continuity based on boolean process
它將布爾代數與時間結合起來，為異步性描述提供了比較形式的理論基礎，並在通路敏化、電源消耗的計算、動態電流測試方法（ i _ （ ddt ） ） 、時延故障診斷等方面取得了實質性的進展。 -
The design of the circuit ? key parameters including pulse width in the level shifter part and delay time of the filter circuit, and the necessity to add a limiting current resistor at source the ldmos were emphatic analyzed. author finished the design of each sub - circuit
對電路關鍵參數高低壓電平位移脈沖寬度、高端濾波電路濾波寬度的設計及在ldmos源端加入限流電阻的必要性進行了重點分析，完成了各單元電路的設計。 -
Based on studying of the multi - level technique, a variable frequency speed regulation system based on the diode clamped three - level inverter is introduced in this thesis in detail. it includes ac - dc - ac main power circuit, snubber circuit, isolated driving circuit by optical fibre, delay time circuit on powering, sampling circuit of current and voltage, protection circuit and etc. a distributed power system ( dps ) which can reinforced the system ’ s security is developed to solve the power supply of the whole system
本文在研究多電平技術的基礎上，研製了一套以二極體箝位式三電平逆變器為基礎的變頻調速系統，包括:交-直-交主功率電路，緩沖電路，光纖隔離驅動電路，上電緩沖延時電路，電流、電壓采樣電路，保護電路等。 -
To solve this problem, quick range measurement technology was researched based on the method of propagation delay and working principle of cpld. a time measurement circuit with an accuracy of ? 0. 2m was designed and accomplished. it could finish the whole measurement process in 80ns after the bounced pulse was received
針對該問題，基於傳遞延時插入法和cpld的工作原理，對快速測距技術進行了研究，研製了一種能實現收到回波脈沖后80ns內完成測距，測距精度0 . 2m的計時電路，並將該電路集成於一片可編程邏輯器件中，減小了電路面積和功耗，增強了抗干擾能力。 -
This dissertation introduces the work principles, hardware circuit structure and application of a pint - sized multifunctional radar echo generator, which can generate various waveforms needed. we can modulate the doppler frequency and adjust the time delay of the waveform to validate the performance the radar system
該設備體積小、操作簡便、便於攜帶，可模擬lfm 、 nlfm 、單頻、相位編碼等多種脈沖信號波形，具有較寬的多普勒調制和時間延遲調節功能，能有效驗證脈沖壓縮與信號處理單元的工作性能，準確評估雷達系統的分辨力、威力范圍等技戰術指標。 -
The lst sigle stage time delay unit is a solid state device which delays the operation of an electrical circuit for a preset period. it has been designed for use with contactors on stepped control systems for electric motors such as are used on electric vehicles
Lst延遲開關可以很簡單又容易的控制電動車電路系統之預定延遲時間；並可配合連接電磁接觸器來逐步控制行走馬達，可以幫助您省略控制電路板與加速器之損壞費用。 -
All the electric safe protection devices now being used function only one time protection when the equipment is out of order, i. e., they can ' t delay the on / off of 220v. once industrial equipment, household appliances and instruments and meters have troubles in mechanism or electronic elements because of overflow, overload, overheat or short circuit and furthermore, one time overheat switch can ' t start to function, there is no second protection device that will cut off the circuit timely, accurately and quickly, to protect the electric equipment
根據消防部門統計，我國目前電器引起火災屢見不鮮（見1999年8月31日上海文匯報第12版報導經消防部門統計，我國目前電器引發的火災，高居火災起因為第一位） ，如以相同用量相比，我國觸電導致死亡人數是發達國家幾十倍甚至上百倍，而且這類事故的發生很大程度是與劣質電器元件有關。 -
In the seventh chapter, some of the above proposed new circuit, such as high frequency, high definition 12 - bit, 80mhz samples / s current - steering dac and fully differential r - mosfet - c bessel filter with accurate group delay, high accuracy bandgap reference and high drive capability cmos operational amplifier have been applied in communication gsm baseband i / o port integrated circuit, all the above blocks meet well with the design requirements of the system, and gain the better testing results, in the mean time, the above proposed high accuracy bandgap reference circuit als
第七章:將本文第二章提出的高速、高精度12位、 80mhz采樣率電流舵結構的數模轉換器和第五章提出的r一mosfet一c結構且具有精確群時延值的貝塞爾（ bessel ）濾波器以及第六章提出的高精度帶隙基準電壓源和高驅動能力全差分運算放大器電路應用於通信gsm基帶輸入/輸出埠晶元，滿足系統設計要求並取得了令人滿意的實測結果。 -
Time - delay circuit
時間延滯電路
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