幀中信元 的英文怎麼說
中文拼音 [zhèngzhōngxìnyuán]
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In this protocol, the transmitter organizes the frame according to it, and the receiptor does validity check of the characters, length check, crc check. thus, the system will work more exactly and efficiently. and based on rs - 485 communication, the paper implements a process communication method, which is impulsed by overtime message of timers ’ check
在這種協議
中，發送方根據協議組
幀，接收方主要採用了字
元合法性校驗、長度校驗、內容的crc校驗，提高了通
信的效率及正確性，最後在rs - 485通
信上實現了基於定時器超時檢測消息驅動的進程通
信策略。
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The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing
本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據
幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其
中a d解碼模塊採集模擬電視
信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據
幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻
信號為系統提供精確的相關同步
信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視
信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統
中編、解碼晶
元的初始化。
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Apon is a passive optical network where atm is adopted to transmit broadband and narrowband cells via the sdh frame structure. the service node interface is stm - n. the statistical multiplexing feature of atm enables a concentrated transmission of broadband services in apon
Apon是在無源光網路
中採用atm傳送技術，利用sdh
幀結構傳送各種寬帶和窄帶業務的
信元，業務節點介面採用stm - n介面。
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Qe1 achieve the whole synchronization by software and hardware. during the course of the initialization of the qe1 system, the chip pm4354 can accomplish the task of synchronization of bit, frame and multiframe after the chip initialization by the software. after pm4354 accomplishes the bit synchronization, qel will read the status registers of the pm4354 to get the status of each el circuit and choose recovered clock of the specified the el circuit as the external timing source of the whole htc - 5200an equipment
Qe1系統在系統初始化時，通過軟體完成對硬體晶
元pm4354的初始化工作后，便可利用該晶
元完成4路e1的同步（位同步、
幀同步和復
幀同步） ；在pm4354完成時鐘提取的任務后， qe1通過不斷地訪問pm4354的狀態寄存器，獲得每路e1的狀態
信息，在時鐘源的選擇原則下，選擇指定e1線路的恢復時鐘作為整個htc - 5200an節點設備的外部參考時鐘，從而解決了htc 5200an的
中繼板卡由e1變為qe時所帶來的網同步時鐘源。
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In this thesis, the principle of polarized light wave transmit in optical fiber is researched, i. e. principle of ternary optical fiber communication is researched. based on the researches, the construction of ternary codes optical end machine and 3b2t optical end machine used in two - state fiber net are designed. the construction and component of circuits in 3b2t optical ( called sign converter circuit - scc ) are designed particularly, including : the clock synchronization module, the data synchronizing, code converting module, frame managing module and error exam and managing module
本文研究了線偏光波動理論以及在光纖中的傳輸原理，研究了三值光通信系統原理和器件原理；在此基礎上，設計了三值光端機和在現有兩值光纖網中實現三值光通信的3b2t三值光端機的組成結構，詳細設計了3b2t三值光端機的電路組成部分（稱為電信號變換電路scc ） ，包括：時鐘同步模塊、數據同步模塊、碼元變換模塊、幀處理模塊及差錯檢測和處理模塊；而且在三值光纖通信基礎上，提出了四值光通信的原理和偏分復用的實用化方法。
