指令寄存器 的英文怎麼說

中文拼音 [zhǐlìngjìcúnqì]
指令寄存器 英文
cmr command register
  • 指 : 指構詞成分。
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 指令 : 1 （指示; 命令） instruct; order; direct2 （上級機關對下級機關的指示） instructions; order; direc...
  1. Firstly, the thesis summarizes the compilation optimizations in modern compiler and the direction of low - power compilation, then analyses the modern compiler such as impact and trimaran, especially their register allocation strategies

    本文首先概述了現代編譯器中的編譯優化技術以及低功耗編譯的方向，具體分析了面向指令級優化的編譯器impact和trimaran ，分析了其中的組成模塊，並深入了解其中的寄存器分配機制。
  2. Risc processors generally feature fixed - length instructions, a load - store memory architecture, and a large number of general - purpose registers and / or register windows

    Risc處理器一般的特徵是固定長度的指令集，一個負載儲備存儲結構，和大量通用寄存器，及寄存器窗口。
  3. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  4. On the base of analyzing the sparc instruction set, this paper researches the pipeline technology and the resolution of correlation problems, and these problems were resolved by using the harvard architecture, internal forwarding and delay branch technology

    本文在分析sparc指令系統的基礎上，研究了流水技術及其相關問題的解決方法，並通過在硬體上使用哈佛結構、提前寫寄存器的操作時間以及內部前推和延遲轉移等技術較好的解決了結構相關、數據相關和轉移相關的問題。
  5. System calls. when an emulator ordinarily encounters a powerpc system call instruction, it emulates the exception by storing the instruction address into the srr0 register, setting some architecture - defined bits in srr1, and transferring control to physical address 0xc00. some powerpc variants allow more control over this behavior, but this is the traditional powerpc model

    當模擬器正常地碰到一個powerpc系統調用指令時，它便將指令地址存入到srr0寄存器，設置srr1中某些體系結構定義的位，並將控制權轉交給物理地址0xc00 ，從而模擬這個異常（有些powerpc的變種允許對這種行為有更多的控制，但是這里的這種是傳統的powerpc模型） 。
  6. An 8-bit instruction register can only specify 256 different operations and variations on operations.

    一個八位的指令寄存器也只能確定256種不同的操作以及對于這些操作的修改。
  7. The collection of instructions is implemented as patterns, each one of which has a different meaning when loading into the instruction register

    指令集合實現為位模式，每個位模式裝入測試寄存器時具有不同意義。
  8. Branch instructions using the contents of the link register or count register to specify the branch target address

    使用鏈接寄存器或計數寄存器來指定轉移目標地址的轉移指令。
  9. The lk bit specifies whether the address of the next sequential instruction is saved in the link register as a return address for a subroutine call

    Lk位指定了下一個順序指令的地址是否作為子常式調用的返回地址保存在鏈接寄存器中。
  10. The ability to save the address of the next sequential instruction is provided on all branch instructions, including the branch to link register instruction

    所有的轉移指令都具備保存后繼順序指令地址的能力，包括到鏈接寄存器的轉移。
  11. These instructions change the contents of the cs register ( and sometimes other segment registers ) as an incidental part of their operation

    而這類指令在執行時會修改cs （或其它段寄存器）的內容。
  12. All instructions are carried out using a register called the accumulator, which we shall denote by a.

    全部指令執行時都用了稱作累加器的寄存器（用符號A來表示）。
  13. The part of execution in which an operand or instruction is read from main stora ge and written into a control unit or arithmetic unit register

    執行過程中的一個階段所需的時間，在此期間，計算機從主存儲器中取出指令或操作數，並將其存入控制器或運算器的寄存器中。
  14. The most common analysis is data dependence analysis, which is to determine the i tructio that use the variable ( register or memory location ) modified by another i truction

    最通常的分析是數據依存性分析，它用來確定指令使用的變量（寄存器或內存位置）是否被另一條指令修改。
  15. The most common analysis is data dependence analysis, which is to determine the instructions that use the variable ( register or memory location ) modified by another instruction

    最通常的分析是數據依存性分析，它用來確定指令使用的變量（寄存器或內存位置）是否被另一條指令修改。
  16. For the real time performance need of the low speed speech compress algorithm and the asic implement of the transfer process between programs, the design is put forward in the paper, in which state registers control the cross access between operator and memory, register windows are used for the parameters transfer, and the technique of hardware controlling is used to avoid pipeline conflict, so that the main problems of the transfer process in tr600 are solved effectively

    摘要針對低速率語音壓縮演算法對處理器系統實時處理復雜運算的性能要求，就程序調用過程的asic實現問題進行了對比與分析，進而提出了用層次狀態寄存器控制存取運算元對存儲體交叉訪問的方法，並結合運用寄存器窗口傳遞參數的功能，以及利用空指令硬布線處理流水線沖突的方法，有效地解決了tr600晶元中調用過程存在的主要問題。
  17. There are no push or pop instructions and no dedicated stack pointer register defined by the architecture

    體系結構沒有定義壓入或者彈出指令，也沒有定義專門的棧指針寄存器。
  18. A design method based on the decomposition and multiplexing technique of complex instruction, combined the decoding arithmetic of instruction and a step counter together, sub - step realization method of multiclocks is proposed. the similarities and differences of architecture between fsm and multi - ? ocks are discussed from two aspects, timing and state space

    提出了執行周期復用的指令分解、指令寄存器與步長計數器聯合譯碼，以及多時鐘同步的控制流設計方法；進而從時間和狀態空間兩個角度深入討論了控制流設計中狀態機和多時鐘兩種常見體系結構的異同。
  19. Command register circuit

    指令寄存器電路
  20. The other alternative is to modify the instruction pointer register using the

    命令修改指令指針寄存器，然後只要輸入
分享友人
分享到 Line

分享到臉書