控制存儲文字 的英文怎麼說

中文拼音 [kòngzhìcúnchǔwénzì]
控制存儲文字 英文
control store literal
  • 控 : 動詞1 （告發;控告） accuse; charge 2 （控制） control; dominate 3 （使容器口兒朝下 讓裏面的液體慢...
  • 制 : Ⅰ動詞1 （製造） make; manufacture 2 （擬訂; 規定） draw up; establish 3 （用強力約束; 限定; 管束...
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 儲 : Ⅰ動詞（儲藏; 存放） store up; save; keep [have] in reserve Ⅱ名詞1. （繼承人） heir 2. （姓氏） a surname
  • 文 : Ⅰ名詞1 （字） character; script; writing 2 （文字） language 3 （文章） literary composition; wri...
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 控制 : control; dominate; regulate; govern; manage; check; cybernate; manipulate; encraty; rule; rein; c...
  • 存儲 : [計算機] memorizing; storage; memory; store
  • 文字 : 1 （書寫符號） characters; script; writing 2 （語言的書面形式） written language 3 （文章形式） w...
  1. Digital image processing consume a large amount of memory and time commonly. basing on the advantage of fpga, the paper design harware module by hdl ( hardware language ), i. e., some function is achieved by les ( logic element ) of the fpga. the real - time of digital image processing is achieved by this. the sample and display of digital image is the important part. so, the paper mainly design the sample and desplay module. the sample card is designed and it ’ s word mode is configured according china ’ s cvbs ( composite video bar signal ). for acquiring the image and storing it correctly to sram, the paper design the sample - control module. the sample module can work correctly using least time. the reliability and real - time achieve the reference. according the vga principle and scheduling of the ths8134, the paper design a vga - control module by hdl. firstly, the control signal is synthesized secondly, the horirontal and vertical synchronization signals is synthesized according to the vga interface standard

    圖像處理的特點是處理的數據量大，處理非常耗時，為實現數字圖像的實時處理，本文研究了在fpga上用硬體描述語言實現功能模塊的方法，通過功能模塊的硬體化，解決了視頻圖像處理的速度問題。圖像數據的正確採集和顯示輸出是其中的兩個重要的模塊，因此，本文主要完成了圖像數據的採集和顯示輸出的設計。本文設計了採集卡，並要對其工作模式進行了配置和編寫了採集控制模塊，在採集控制模塊的控制下，將數字圖像數據正確無誤的存儲到了sram中。
  2. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  3. It ' s well known that the project documentations " storage and management have an very important effect on the development of all kinds of project, and as the information age is coming, network technology has been applied to this procedure gradually. this article mainly introduces the study and realization of a internet - based project documentation storage and management system which application programming frame is built with delphi6. 0 and sql server2000. based on the tcp / ip protocol, the system try to establish a c / s model with connection - oriented, dependable stream sockets and multithread technology to complete some especial data communications by networks, such as the files of project, directory of user, all self - defined commands or messages and their parameters, and so on

    本文所研究的《基於internet的項目文檔存儲管理系統》通過delphi6 . 0和visualc + + 6 . 0相結合的開發平臺，結合sqlserver2000 ，將client server模式的數據庫技術和windowssocket網路通信技術進行集成，遵循tcp ip協議，同樣採用c s結構運行於internet ，通過服務器將處于各個不同物理位置的客戶機連接起來，形成一個交流平臺；其中，引入了目前國際上流行的先進的安全管理控制方法? ?角色控制理論對用戶進行權限分配，使擁有相應角色的人具有相應權限；然後系統自動根據組織部門或用戶的設立在服務器端生成相應的網路「虛擬文件櫃」 ，使擁有相應權限的人可以對相應文件櫃中的文檔進行整理；再通過多線程技術和windows套接字通信機制在tcp ip協議上實現了單個文件及目錄的傳輸。
  4. This digital pattern generator composes of eight parts : interface circuit unit, dual - port sram unit, dsp unit, dac unit, expose / mark signal detection control unit, mark signal diction unit and final expose shape registers unit

    本論文中的新型圖形發生器由介面電路、雙埠存儲電路、數字信號處理電路、數模轉換電路、曝光標記檢測控制電路、標記檢測電路、最終曝光數據寄存器單元和束閘控制電路構成。
  5. Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp

    本文首先介紹飛行模擬訓練系統的主要組成；接著說明飛控計算機整體系統方案的設計；然後詳細說明飛控計算機硬體平臺的設計，包括ad轉換、多串口通信、外部存儲器的擴展以及採用可編程邏輯器件cpld實現電路的邏輯控制等幾部分，體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面；最後是軟體部分的編程，包括cpld部分的硬體描述語言程序設計，和dsp部分相關的程序設計。
  6. 2. the design of low - level driver of powerpc 405. after thoroughly collecting and consulting the latest information in the field of sopc, in this thesis we choose fpga embedded powerpc405 processor hardcore to construct the demanded sopc system, which manages to meet the application demand between

    論文課題在認真深入地調研了國內外sopc領域的最新資料后，選擇了嵌入powerpc405處理器硬核的fpga片上可編程系統，解決vxi介面與本地ram控制器的通訊和靜態存儲器存儲控制等方面的應用需求，通過powerpc硬體設計和底層驅動軟體編程，構建了滿足設計需求的高速數字測試系統。
  7. By fpga optimization technology the card can be more integration and portability. using oscillograph principle the dissertation designs a set of digital memory oscillograph system implementing pre trigger, center trigger and after post trigger

    本文結合示波器原理自主研發了一套數字存儲示波器控制系統，並利用該系統實現了示波器常用的前觸發、預觸發和后觸發3種觸發功能。
  8. On the bases of detailing the control theory and circuit of dc - ac converter, this paper introduces the fuzzy logic theory into the control of the digital pwm converter. in order to realize the control strategy, intel high performance micro controller 80c196kc, the kernel of the intelligent controller are purposed

    本文在討論逆變器控制理論和控制電路的基礎上，將模糊控制理論引入到數字式pwm型逆變器的控制中，設計了以80c196kc為核心的智能控制器，用新型的基於eprom存儲的pwm電路給予實現的硬體電路。
  9. This dissertation has studied some key technologies in the field of dpcs on av. first, this dissertation gives a summarize about the development status of the alteration and upgrade in the tv broadcasting system, in which a serious of key technologies of dpcs, including digital compression codec technology, large capacity storage and fault - tolerance technology, network connection technology, and systems security mode, are stressed

    論文首先對視頻廣播行業數字化改造的現狀與趨勢進行綜述，重點討論了數字播控所涉及的若干關鍵技術的概況，包括數字壓縮編解碼技術、海量存儲與容錯技術、網路互連技術和系統安全備份播出技術等，並對電視節目的制、編、播一體化網路進行展望。
  10. The task of realtime display on lcd and the complicated control arithmetic are implemented in this smps system, and a microcontroller with high resolution, high speed, high integration, large memory is necessary. in this paper, the design theory of s / h ware module which forms the smps control module and the design scheme is discussed in detail. in this system, the digital compute - control module is implemented with samsung ’ s high resolution, high integration, arm core microcontroller s3c44b0 and ad converter with 16bit resolution produced by ad company, ad7705. the ad7705 implements the data acquisition of the voltage and current feedback signal, and transfer the data to microcontroller through spi bus, which is implemented with s3c44b0 ’ s gpio, for computation and display

    本開關電源系統不僅完成lcd的實時顯示，還要完成復雜控制演算法，需要高速度、高精度、高集成度、大存儲空間的微控制器的支持。本文詳細的論述了構成電源控制模塊的各個軟硬體模塊的設計原理和設計方案。本系統提出了以samsung公司的高速度、高集成度的基於arm架構的微控制器s3c44b0與ad公司具有16位解析度的模數轉換器ad7705晶元構成數字採集運算控制模塊。
  11. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進電機細分驅動系統，由數字控制模塊、驅動模塊和電源模塊組成，系統以at89c52單片機為核心，通過單片機的i o口、定時器計數器中斷來實現外部事件監控以及控制信號的產生，系統將可編程邏輯器件（ pld ）器件和在系統編程（ isp ）新技術引入到細分驅動環行分配器的設計，通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構，大大簡化了電路，並提高了電路抗干擾能力。使系統實現參數存儲，速度數字控制，數碼顯示，進退刀控制等功能。
  12. So develop the technology of handhold dso with ourselves patent have beautiful future 。 in this paper, we will discuss these correlative problems including the design of data acquiring system, a novel fashion of display with no control chip etc. the main attributions of the paper include : 1

    本文主要研究在實時和隨機兩種取樣方式下的手持式數字手持式存儲示波器的數據採集系統的設計和無專用控制晶元下lcd顯示控制電路的實現等問題。本文的主要工作: 1 .數據採集系統設計。
  13. When working with data source controls it is recommended that you centralize the location of your connection strings by storing them in the application s web. config file

    在處理數據源控制項時，建議您將連接字元串集中存儲在應用程序的web . config文件中。
  14. The controlling digital circuits inside fpga, are the core portion in the implementation of the dso, while the gui ( graphical user interface ) is the only interface between the user and the dso, they are both the main topic of the dissertation

    外圍控制電路是數字存儲示波表硬體實現的主要部分，而gui是用戶與系統之間唯一的交互途徑，也是軟體設計的重點，這兩部分便是本論文所要重點討論的內容。
  15. The dss design in this project is the first one in this field in china, and reaches the international level at the end of 1990s as well. the software designed in this project is based on the microprocessor ( singlechip w77le58 ) that is used of management and control electrocircuit and signal collecting 、 data calculation 、 data storage 、 data communication and signal display

    本文中數字存儲示波表的軟體設計以微處理器（單片機w77le58 ）為核心，對示波表中各種功能電路進行管理和控制，執行信號採集，數據計算，數據存儲，數據通信，顯示等任務。
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