數字電路模塊 的英文怎麼說

中文拼音 [shǔdiànkuāi]
數字電路模塊 英文
dcm digital circuit module
  • : 數副詞(屢次) frequently; repeatedly
  • : Ⅰ名詞1 (文字) character; word 2 (字音) pronunciation 3 (字體) form of a written or printed ...
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 名詞(古時佩帶的玉器) penannular jade ring (worn as an ornament in ancient china)
  • 數字 : 1. (表示數目的文字; 表示數目的符號) figure; digit; numeral; character; numeric character 2. (數量) quantity; amount
  • 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  • 模塊 : camac module,camac
  1. As to the abuses of that analog circuits mix digital ones, special components mix general ones, and overfull append devices in domestic and overseas capsule endoscope electric systems, we introduce a full digital, high - integration and simple - configuration idea for the design of capsule endoscope electric system, then designed and made camera module, wireless transceiver module and usb data transfer module

    針對目前國內外的膠囊內窺鏡子系統裝置中,並存、專用器件與通用器件並存、附加設備過多的弊端,本文提出了化、集成化、精簡化的膠囊內窺鏡子系統設計思,並分別設計製作了膠囊內窺鏡系統的攝像、無線收發和usb據傳輸
  2. In this paper, the design of a specific chip for circuit emulation based on ip is put forward and realized and the main functional modules and the key algorithms including an all - digital adaptive clock recovery method and a dynamic depth buffer algorithm are described in detail

    文章根據相關標準提出並實現了一種擬專用晶元的設計方案,並對其中主要功能和關鍵演算法作出了詳細說明,包括一種全的自適應時鐘恢復方法、動態深度緩沖演算法等。
  3. This new family of dsp enables cost - effective design of intelligent controllers for brushless motors which can fulfill more conditions, consisting of fewer system components, lower system cost and increased performances. in the aspect of vibration detection and analysis, the system gets two - way vibration signals. after magnifying and filtering, the signals are inputted to dsp, and are analysised by dsp based user ’ s demand

    振動測試分析部分採集兩振動信號,經過隔離放大、濾波等信號調理后輸入dsp的片上ad,在dsp上構建相應的據採集,以及濾波、時域分析、幅域分析等多種信號處理,根據用戶需求對旋轉機械作相應的檢測與診斷。
  4. This converter includes not only analog parts such as the bandgap voltage reference, voltage pump, sample / hold unit, one bit comparator of high precision, multiply - by - two and difference unit, but also digital parts such as register and multiplexer. so the design of this type of converter is mixed signal design

    轉換器的內部包括基準源、降壓、抽樣保持單元、高精度的1bit比較器、倍乘作差單元等,以及寄存器組、選擇器等數字電路模塊,屬于混合
  5. The ade7758 is a high accuracy 3 - phase electrical energy measurement ic. it incorporates adcs, a digital integrator, reference circuitry, temperature sensor, and all the signal processing required performing active, reactive, and apparent energy measurement and rms calculations

    Ade7758是高精度三相量測量專用晶元,它集成了adc 、積分器、參考、溫度傳感器以及能測量和有效值計算的處理
  6. In the following chapters, a 16 - channel experimental phased array ultrasonic testing system is thoroughly explained, including digital beam forming, low noise programmable amplification of received ultrasound signal, multi - channel hi - speed hi - precision data acquisition, hi - speed real - time processing of multi - channel ultrasound signal, and hi - speed data transfer based on pci bus. in addition, the frame of software system is built

    本文詳細闡述了作者所獨立研製的16通道相控陣超聲檢測實驗系統,包括化超聲發射/接收波束形成、超聲信號的低噪聲程式控制放大、多通道高速高精度據採集、多通道超聲信號高速實時處理、基於pci總線的高速據傳輸等全部的結構及工作原理,並說明了所編寫的底層軟體系統的框架。
  7. Chapter 5 explains the signal flow in the if module and the theory in fm modulating and demodulating, and shows a few algorithms of the fir filter design and the spectrum comparing realized by the dsp chip, produces their result in the matlab simulator and real circuit debugging

    第五章介紹了中頻的信號流程、 fm信號調制與解調理論,介紹了用dsp晶元實現的fir濾波,頻譜比較等演算法的matlab擬與實際的調試結果。
  8. In the hardware design, the analog circuit, high - speed a / d convertor, storage control logic and vxibus interface are discussed. the results of the simulation and analysis of the circuits are given

    的硬體設計部分中,著重對信號調理、高速a / d轉換器、高速存儲邏輯控制以及vxi總線介面等內容進行了討論,給出了具體的設計和關鍵器件的說明,並對部分進行了擬分析。
  9. Some measure about reform of digital circuit experiment were introduled. some comprehensive experiments of design were added, and the teaching method of circuit module was given out to enhence the training on students ability of using hands, so that the basic competence of the students was raised

    介紹了實驗改革的具體方法,提出了增設綜合設計性實驗內容,加強學生動手能力訓練的應用教學法,以提高學生的素質水平
  10. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計的設計基礎上,通過對原缺陷的分析,採用一些新的技術和新的子器件來重新設計該計:採用最新的fpga技術來提高的集成度,將原中的所有全部集成在fpga晶元中,這樣不僅能節約成本,還能提高的可靠性和測量精度;採用高速的信號處理器( dsp )取代原有的單片機作為協處理器,來接收vxi發來的各種命令,分析命令、執行命令、協調各部分的工作以及對據的處理;採用轉換速率更高的比較器晶元將輸入的被測信號轉換為fpga晶元能夠識別的方波信號,能極大提高測量頻率的范圍;採用d / a轉換晶元和隔離運算放大器得到隔離通道所需的比較平,該比較平值能夠根據實際需求進行設置,能增強的使用靈活性。
  11. Firstly, analyzes the theory of previous transformer calibrator, based on the theory of previous transformer calibrator, propose the improvement method and expound the reality meaning of studying the topic. secondly introduces the measure theory of transformer calibrator, designs the transformer calibrator system of hardware control : digital disposal module design, module board design, the emc design and summarizes the system of hardware debug

    本文首先介紹了國內外互感器校驗儀的發展現狀,基於互感器校驗儀的發展現狀提出了改進的方法和本課題研究的主要內容,闡述了開發本課題的現實意義;接著介紹了互感器校驗儀的測量原理,對互感器校驗儀控制系統硬體進行了詳細的設計:處理的設計、擬板硬體設計和磁兼容性設計。
  12. Second, a single - end to dual - end lna which benefits for integrating the rf block and the digital block is presented

    這一類的低噪聲放大器對于將整個射頻和後端的集成很有益。
  13. The hardware unit is typical high speed digital circuit which is the current hot research point

    該系統的硬體是典型的高速,這也是當今世界設計的一大熱點。
  14. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進機細分驅動系統,由控制、驅動組成,系統以at89c52單片機為核心,通過單片機的i o口、定時器計器中斷來實現外部事件監控以及控制信號的產生,系統將可編程邏輯器件( pld )器件和在系統編程( isp )新技術引入到細分驅動環行分配器的設計,通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構,大大簡化了,並提高了抗干擾能力。使系統實現參存儲,速度控制,碼顯示,進退刀控制等功能。
  15. In part three, educed an equation of the nonlinear dynamic equation of complex map and designed a kind of digital circuit used to spread spectrum sequence

    第三部分推導並建立一個復合映射動力學方程產生擴頻序列構造
  16. There are mainly four parts about control synchronization of hyperchaos and their application in this paper : optic systems is modulated with electronic parameters, the unit of function circuit is applied to construct circuit system, educed a equation of the nonlinear dynamics of complex map and designed a kind of digital circuit used to spread spectrum sequence and application experiment of secure communication system

    全文內容主要包括四個主要研究方面:調制光學系統,形成超混沌控制和同步;單元功能法構造超混沌實現超混沌控制和同步;推導復合映射動力學方程產生擴頻序列構造;利用超混沌動力學系統展開保密通信實驗應用研究。
  17. However, this module exposes some questions gradually along with the developed electronics and increasement of practical requirement. the main questions are that the measurement precision and measurement range of frequency could not meet higher and higher practical requirement, some electronic components adopted have stopped production or could not keep up with the era development, poor integration of digital circuits and the comparative level value could not be set with the actual requirement

    但隨著子技術的發展和實際需求的提高,該也暴露出一些問題,主要是測量精度和測量頻率的范圍已不能滿足日益提高的實際要求、所採用的一些子器件已經停產或者跟不上時代發展的需要、集成度較差和隔離測試通道中的比較平值不能隨實際需求進行設置。
  18. In this thesis, we would present theory research and its implementation about mpeg - 2 ts stream “ health ” check analyzer. a brief narration about the background of our research and its mean would be put in the beginning. and then we would analyze structure of ts stream and its definition in iso / iec 13818 - 1, data structure of system layer and mechanism of decode would be stressed in this section, later, we would introduce principles and methods of mal - function check in mpeg - 2 ts network, parameters being presented by etsi tr 101 290 would be emphasized in this part

    本文將對mpeg - 2ts碼流「健康」檢測儀的理論研究和設計作出如下介紹:本課題研究的時代背景及研究現狀和意義; mpeg - 2ts碼流的據結構,在iso / iec13818 - 1中的定義和描述,其系統層的據結構及解碼機理; mpeg - 2ts碼流在網中故障檢測的原理和方法, etsitr101290規定檢測參分類; mpeg - 2ts碼流「健康」檢測儀實現的總體方案,基於fpga的邏輯實現方案總體劃分,劃分的依據,實現功能;總體方案的具體實現,幾個重要參如pcr間隔及精度檢測,快速crc檢測等的實現;設計實現的驗證方法,典型參檢測實現的驗證型及驗證結果。
  19. However, the hardware of the system is different from traditional analog or digital circuit

    同時,本系統的硬體不同於傳統的擬、
  20. In this solution, the embedded soft cpu ip core is used as the kernel digital module with its periphery controllers based on residual les. in addition, analog channel circuit is added to form an integrated dso system. this dissertation focuses on framework construction, gui design, memory management, message fifo management, other hardware drivers and describes design and implementation of software simulation system written in advanced languages

    在這種方案中,使用了在fpga中嵌入cpu軟核作為控制核心,並用fpga晶元中剩餘的其他可編程邏輯資源構成該嵌入式系統的外圍器件,形成示波表的核心,並配以擬通道部分,組成了一個完整的示波表。
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