時序電碼 的英文怎麼說

中文拼音 [shíxùdiànmǎ]
時序電碼 英文
time sequence code
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 碼 : Ⅰ名詞（表示數目的符號或用具） a sign or object indicating number; code Ⅱ量詞1 （指一件事或一類的...
  • 時序 : [地質學] sequence; sequential; time sequence; timing sequence; sequence in time
  1. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  2. The world s largest software maker also announced that it would launch the next version of its office spreadsheet, e - mail and word processing programs during the second half of 2006, the same time frame it is planning for the next version of windows, code - named longhorn

    微軟公司同時宣布，將於2006年下半年發行office電子製表軟體電子郵件以及文字處理程序的最新版本。同期，還將發行windows操作系統的新版本，代碼名為longhorn 。
  3. Setup functions enable user - defined adaptation of a wide variety of options such as display contrast, record printout, saving data on the computer, general code, temperature calibration, acoustic signal, date and time, id, data transfer, update fix programs, language, c f changeover, check program, battery change, diagnosis data, printing programs, seal test, service functions for maintenance

    設置功能允許使用人員對多種選項進行定義和調節，例如顯示屏幕對比度列印記錄把數據記錄到計算機上總碼溫度校正音響信號日期和時間識別傳輸數據固定程序升級語言攝氏和華氏溫度轉換檢查程序更換電池診斷數據列印程序測試密封保養用服務功能。
  4. Setup functions enable user - defined adaptation of a wide variety of options such as display contrast, record printout, saving data on the computer, general code, temperature calibration, acoustic signal, date and time, id, data transfer, update fix programs, language, screen saver, c f changeover, check programme, battery change, diagnosis data, printing programs, seal test, service functions for maintenance

    設置功能允許使用人員對多種選項進行定義和調節，例如顯示屏幕對比度列印記錄把數據記錄到計算機上總碼溫度校正音響信號日期和時間識別傳輸數據固定程序升級語言屏幕保護攝氏和華氏溫度轉換檢查程序更換電池診斷數據列印程序測試密封保養用服務功能
  5. Time series of discharge in neurons, that is, interspike interval ( is i ) series of action potential is considered to contain plenty of sensory information. however, there is little understanding of basic type and generating mechanism of this time coding because of the complexity of isi series

    神經元放電的時間序列，即動作電位的峰峰間期（ interspikeinterval ， isi ）序列被認為蘊含豐富的神經信息，但是由於isi序列的復雜多變，至今對這種時間編碼的基本型式及其發生機制了解很少。
  6. The whole correlation - inheritance coding circuit system is designed, simulated and verified in verilog hdl on the candence systems

    採用了硬體描述語言verilog對整個相關繼承矢量量化圖像編碼電路系統在cadence系統上進行了西安理工大學碩士論文設計、模擬及時序驗證。
  7. Now, with the rapid development of computer and electronics, there have been a great progress in the field of input / output device technology. among this field, pci has been a current standard interface of pc. and in order to accommodate the development of operating system, wdm has been a driver model adopted by industry generally. at the same time, in the respect of sensor ’ s application, a high precision and high integrated incremental rotary encoder has been an outstanding one among the displacement sensors. meanwhile, eda technology and cpld / fpga chip applied in the signal processing circuit are approved by a great number of engineers who are engaged in designing the electronic device

    目前，隨著計算機技術和電子技術的飛速發展， i / o設備介面控制技術領域有了長足進步。其中， pci介面成為主流的微機標準介面，而與操作系統平臺的發展相適應， wdm已成為業界普遍採用的驅動程序模式;同時，在傳感器應用方面，高精度、高集成的增量式旋轉編碼器已是位移型傳感器中的佼佼者，而eda技術和cpld / fpga器件在信號處理電路中的應用被廣大電子設計人員所認可。
  8. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  9. Based on the realization of the encoder / decoders, this scheme aims at the highest rate downstream frame, and has realized the parallel fec circuit and scrambler complying with the protocols and maken a simulation. the fprme decoder is advanced in the world. the parallel fec circuit completely conforms to the itu - t protocols, and has important practical value

    在rs （ 255 ， 239 ）硬體編碼器/解碼器實現的基礎上，本文按照gpon協議要求，針對gpon中最高速率2 . 488gbps的下行幀，通過設計復雜的操作時序，實現了符合協議規定的32位并行fec編解碼和解擾碼電路，並作了模擬。
  10. A computer virus is a program or piece of code that is loaded onto your computer without your knowledge and runs against your wishes. all computer viruses are manmade

    計算機病毒是一個程序或者一段代碼，在你未覺察時進入你的電腦，從事違反你意願的活動。所有的病毒都是人編出來的。
  11. In this paper we discuss mca circuit, the sequential logic for mca data collection, for the setting of the uld, lld and the gain of pga, as well as the combinational logic for decoding circuits of the computer interface, based on cpld

    本文詳細論述了利用cpld實現的脈沖幅度多道電路及其數據採集的時序控制邏輯、閾值設定和程式控制放大倍數設定的時序控制邏四川大學碩士學位論文輯、以及與計算機介面的譯碼電路等組合控制邏輯。
  12. From the windows side, they will have no indication that they are following a symlink. it will just appear as a regular file or directory. we ll look at several parameters that can change this behavior to make samba more secure

    例如，能看得見的效果可能是，當服務器負載超過了某個閾值時將綠色改成紅色，或者是顯示最近接通的三個電話號碼，或者是顯示某個大型生產過程中最近分析過的蛋白質序列。
  13. The minimum control system of single - chip micro - controller has two part of binary systems serial communication. for the communication between pc and the single - chip instrument, i chose to connect a chip named max232 to proceed the level conversion in electricity, establish the correspondence agreement, drawing the hardware connection diagram, and designed the correspondence procedure process with parts of procedures code ; for the communication between the single - chip instrument and the fx489, thesis uses 8251a to expand 89c51 for a serial port

    對于pc機和單片機的通信，論文選擇了介面晶元max232進行電平轉換，設定了雙方通信協議，畫出硬體連接圖，並設計了通信程序流程及部分程序代碼；對于單片機和fx489之間的串列通信，論文採用了8251a擴展了89c51的一對串列口，同時也設計了這部分的通信程序流程及程序代碼；另外，還對89c51擴展了一片數據存儲器6264 。
  14. In many cases, the desire for convenience in completing transactions, with the aid of advanced telecommunications technology, is achieved through compromising the need for authentication. what little authentication requirement there is for example, a simple code at the back of the credit card for telephone orders, which admittedly may not be entirely effective is sometimes dropped

    在許多情況下，大家利用先進的電訊技術，以能方便快捷地完成交易，卻犧牲了認證的程序，簡單如進行電話訂購時以信用卡背面的密碼來認證雖然不一定完全有效這個步驟有時也放棄了。
  15. Moreover, video control program to implement internal function of fpga is designed including video capture time sequence control, ping - pang frame buffer read and write time sequence control and lcd display time sequence control, and program ' s simulation and analysis is also provided. at last, this paper presents a portable iv ' s video processing system, and proposes three buffer strategy to control capture buffer. and a moving object detection algorithm of combing an adaptive background subtraction technique with a three - frame differencing is adopted

    設計了基於fpga系統結構的車載視頻顯示電路板；利用單片機io口模擬i2c時序，實現了視頻解碼晶元控制；利用fpga實現視頻控制，研究了採集通道時序控制、雙幀存ram讀寫時序控制及lcd顯示時序控制的方法，並進行了軟體模擬和分析；設計了車載視頻檢測系統方案，給出了管理採集緩沖區的三幀緩沖策略，採用綜合三幀差分和自適應背景相減的演算法實現運動檢測，連通體檢測去除虛目標，模擬實驗證明其有效性，同時分析了該演算法在dsp視頻檢測系統中的簡單實現方法。
  16. The digital one includes spec, verilog coding, simulation, synthesis, floorplan, routeing, static timing analyze and drc / lvs check

    數字電路設計流程則包括：制定spec ， verilog代碼編寫，模擬，邏輯綜合，布局，布線，靜態時序綜合和drc lvs檢查。
  17. These sensors make up of a network for signal detection, muti - step transmission is used to transmit the signal, and self - examination is a useful function for each unit. 2

    三種傳感器在一定范圍內組成一個探測網路，網路中的各探測單元利用自行設計的多級傳輸的方法傳遞信息，解決了傳輸中的編碼及時序問題，設計了具體電路。
  18. For the running safety of stream turbine, the article discusses the design of monitor, developing method, precautions etc. the paper outlines the situation, devolvement and application home and aboard in stream turbine, and also discusses the monitoring principles, circuit design of input and output channel and communication interface. the monitoring software system is designed with pic microcomputer whose arithmetic is studied in the article. the software groups several scattered procedure into only one, which simplifies the development process and management for users

    文中綜述了目前國內外汽輪機監控系統的現狀、發展和應用；對于監控系統的硬體電路設計，從監測原理、輸入輸出通道電路設計，通訊介面設計等方面進行了探討，並充分利用pic單片機進行了控制軟體的設計，分析了部分演算法的實現，並創造性將數個原分散的系統儀表的控製程序集成到單一的軟體中去，簡化了開發過程和用戶對軟體的管理；同時，文章分析了智能系統儀表可能產生干擾的因素以及相應處理措施；介紹了系統上位機軟體的功能，並重點分析了實時數據採集功能的實現方法，給出了具體的程序代碼；最後，文章論述了系統的調試方法及實驗結果。
  19. Based on a sequential word - level fault parallel fs algorithm, we develop a multi - processor fault parallel fs algorithin and a multi - processor pattern parallel fs algorithin

    並設計了針對同步時序電路的基於單機字級故障并行fs演算法的多機故障并行fs演算法和基於確定性演算法的多機測試碼并行fs演算法。
  20. We first propose and implement a sequential word - level pattern parallel fs algorithrn for synchionous sequential circuits. differing from other similar algorithins, it utilizes the relative independence of every fault test sequence generated by the g - f two - value tg algorithm, pwtitions and dynamically mounts test pattem, avoids redundant simulation for added synchlronous sequence, and gets better results

    首先提出並實現了一個新的同步時序電路單機字級測試碼并行fs演算法，該演算法與現有同類方法的不同在於，利用確定性g - f二值tg演算法的每個故障測試序列之間的相對獨立性，對測試碼進行分解並動態組裝，避免了對添加的同步序列的冗餘模擬，效果較好。
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