時鐘功率 的英文怎麼說

中文拼音 [shízhōnggōng]
時鐘功率 英文
clock power
  • : shí]Ⅰ名1 (比較長的一段時間)time; times; days:當時at that time; in those days; 古時 ancient tim...
  • : Ⅰ名詞1 (用銅或鐵製成的響器) bell 2 (計時器) clock 3 (指鐘點、時間) time 4 (沒有把兒的杯子...
  • : 名詞1 (功勞) exploit; merit; meritorious service [deed]: 戰功 military exploits; 立功 render me...
  • : 率名詞(比值) rate; ratio; proportion
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  1. Electric - controller is nubbin in developping. we are based on designing to structure of circuit, we are dead against in time and stabilization for controlling and communications, precision and rapidity for transformation etc. we have completed to select on microprocessor, clock - frequency and a / d transfer. it carry out transformation for valve position signal, and select on solid - switch ac

    在控制器的電路結構設計的基礎上,考慮到通訊、控制的及、穩定、轉換的精度和速度等幾方面,主要完成對微處理器的選擇、和a d轉換器的選用,閥位變送能的實現,固態交流開關和顯示器的選擇等。
  2. Above all, [ 12 : 8 ] harming error correction theory is mentioned in this paper. the edac circuit designed by vhdl can works normally at different frequency of the cpu clock such as 66mhz 50mhz 40mhz 33mhz. the edac function of the circuit can also be disabled by software tool. meanwhile, some basic devices such as and logic, or logic, not logic and some small scale integrated circuits are also integrated in the fpga

    本論文闡述了12 , 8漢明碼糾錯設計過程,採用vhdl語言實現糾錯編碼器( edac ) ,本設計能夠適應cpu信號clk2的不同頻,如66mhz 、 50mhz 、 40mhz 、 33mhz ,並且能夠通過軟體的控制使fpga的糾錯編碼能關閉。
  3. Adopts vdsm process technology however two outstanding problems are faced to ic layout design when the feature size reaches to 0. 18 m or lower : 1. timing convergence problem seriously affects the circuits schedule, and the interconnect - delay has exceeded more than 70 % of the total circuits ’ delay. 2. si problem, usually it consists two aspects of ir - drop and crosstalk. these problems often affect the chip function after tapout

    本篇論文就是針對超深亞微米階段soc晶元後端設計所面臨的挑戰,提出了運用連續收斂的布局布線策略,尤其是虛擬原型的設計理論,來快速驗證布局,進而提高布線的成,並且提出了一種改進的布局評估模型,提高對soc晶元預測布線的準確度;同,對于驅動元件選擇,文中提出了一種基於正態分佈模型來達到更有效的選取。
  4. The concept of " timing " in the article is not the clock in our ordinary living, but syntheses which is made up of some frequency source in the signal generator ( such as cs atom frequency standard, rb clock & high accuracy quartz crystal oscillator ) which produces the primary frequency, the matching input interface and the matching output interface and controlling circuit etc. for example, bits is a kind of timing equipment, which is used to control the timing of some functions

    本文論及的「」概念不是指日常生活中使用的表,而是由產生基準頻的信號發生器(如銫原子頻標準、銣及高精度石英晶體振蕩器等)中的某種頻源以及相配套的輸入、輸出介面和控制電路等組成的一整套具有特定同步定能的綜合體。如bits就是一種設備,它提供用在通信系統中控制某些能的定間基準設備,提供的信號稱為基準信號、定信號或同步信號。
  5. The paper first reviews the research background and actuality of the filter " s design in china and other country, introduces the meaning of the project and the work of the paper, narrates the theory of the switched - capacitor network and the basic switch building blocks, analyses the related factors of the design of sc filter. such as the selection of the architecture, the trade off of the opamp " s gain, bandwidth, phase margin, slew rate and setting time, the effect of the switch " s on resistor, how to reduce the charge injection and the clock feed - through, the power consumption and the selection of the sampling frequency and so on

    本文首先回顧了濾波器設計的國內外研究背景和現狀,介紹了本課題提出的意義以及本文的主要工作,論述了開關電容網路原理和基本開關模塊,分析了開關電容濾波器設計的相關因素:電路結構的選擇,對運算放大器設計中高增益、寬帶寬、相位裕度、轉換斜和建立間等的折中考慮,開關的打開電阻對電路的影響,開關電容電路中怎樣減少電荷注入和饋通,以及整個電路的耗問題和采樣頻的選擇等。
  6. After analyzing and comparing different partition rules, md32 pipeline architecture is finally defined, which meets the required instruction function, frequency and timing spec of md32. a complete set of creative design method for risc / dsp md32 micro - architecture is presented, such as parallel design, internal pipeline, central control, etc. thanks to the adoption of these design methodology, control path and data path are separated, circuit delay is reduced, and complex instruction operations are balanced among multiple pipeline stages

    它們將若干復雜指令操作均勻分配在幾個流水節拍內完成,實現了任意窗口尋址等復雜指令操作,將整個處理器的數據通路與控制通路分離,減小了電路延,從而滿足了risc dsp不同指令能和系統的要求,構成了統一的、緊密聯系的、協調的md32系統結構。
  7. The protoplast of ni - 5k was inactived after treated by 20w uv, 35 minute. the mycelium of t - 730 and ni - 5k were treated with mixed enzyme which including cellulase

    用uv對黑麴黴ni - 5k原生質體進行滅活處理,滅活條件為:紫外線燈20w ,煙巨40cm ,滅活間35分
  8. Melatonin has a simple chemical structure, but it plays a decisive role in bodily functions, monitoring the work of the glands and organs, and regulating hormone production. it also controls over - stimulation of the sympathetic nerves to lower blood pressure and slow the heart rate, thus reducing the impact on the heart. it also alleviates mental stress, improves sleep, adjusts the body s biological clock, relieves jet lag, strengthens immunity, increases the body s resistance to germs and viruses, and prevents cancer and senile dementia

    褪黑激素的化學結構非常簡單,但是在人體內卻具有舉足輕重的作用:它監視著體內各種腺體器官的運作,指揮各種荷爾蒙維持在正常的濃度它可以抑制人體交感神經的興奮性,使得血壓下降心跳速減慢降低心臟負擔它能夠減輕精神壓力提高睡眠品質調節生物緩解差效應,而且具有加強免疫能抵抗細菌病毒及預防癌癥老年癡呆癥等多種疾病的效。
  9. In view of the present situation, in this paper, a new moisture analyzer which combines infrared drying oven and electronic balance is proposed takes dsp as the information processing unit. it presents the instrument structure and the hardware design of the system. it actualizes the temperature real time control in the drying equipment through controlling the power of the heater element and taking an complex control method

    針對這一現狀,本文提出了一種將紅外乾燥箱和電子天平相結合,利用dsp作為信息處理單元的水分測定儀;給出了儀器結構和dsp系統的硬體電路設計;研究通過對加熱元件的控制實現乾燥箱的溫度控制,採用智能復合控制策略對乾燥箱的溫度進行實控制,乾燥箱的溫度達到105的間可由單純pid控制的2分減少到1分,且控制精度高。
  10. Strong power ( 3. 5kw ) servocontrol foil feeding works smoothly at a high speed ; cutting die & stamping honeycomb chase can be exchanged mutually, and it ' s easy to handle ; rapid - heating electric heater ( temperature can raise to 100 ? c within 30 minutes ) is matched with timing heating and thermo functions

    ( 3 . 5kw )伺服控制送箔,快速穩定;模切刀版和燙金用蜂巢板可調換使用,裝卸方便;快速升溫電熱板(只須30分可升溫100 ? c ) ,且配有定啟動升溫間及保溫能。
  11. And the selection and design of switch - in module, switch - out module, communication module, clock module, data storage module, keys module and frequency detecting module are also discussed

    論文中還給出了開關量輸入、開關量輸出、通信模塊、電路、數據存儲器、按鍵電路和頻跟蹤電路等各能模塊的選擇方法和設計原理。
  12. Chapter seven puts forward the scheme to adjust data rate, discusses the design in multi - clock circumstances, and implements the multi - clock application on adjusting data rate for dvb - s

    第七章實現了調整數據速能,討論了多設計的問題,並給出面向dvb - s數據速調整應用的多解決方案。
  13. Our work in this thesis is to construct a minimal power gated clock tree by integrating these two schemes

    在本篇論文,我們將整合閘控及限制序差異樹的方法去建構出一個擁有最小消耗的閘控樹。
  14. The switch power will operate at ccm condition when circuit is set to pwm mode. when pfm mode is selected for the operation mode, the switch power will still operate at pwm condition with the high load, the system will cancel the pwm mode and enter the pfm mode only when the load is drop to a certain threshold to boost the operation efficiency at light load, make the ic has high efficiency within wide load range

    選擇pwm模式,開關電源將工作在ccm模式下;選擇pfm模式,在負載較高的情況下,開關電源仍然工作于pwm模式,只有當負載降低到一定程度,開關電源才退出pwm模式,而按照pfm工作模式操作,跨過一部分周期,降低頻相關耗,以提高輕負載低效的問題,使得開關電源在很寬的負載范圍內都具有高效
  15. Eg. the new engine has a capacity of 4. 3 litres and a power out - put of 153 kilowatts at 4400 revolutio per minute

    這臺新發動機的容積為4 . 3升,轉速為每分4400轉輸出是153千瓦。
  16. Power fuequency ac voltage 2kv last 1 minute, the impulse voltage is 6kv

    久留電壓2kv歷1分沖擊電壓6kv
  17. Dynamic power is dominant component of the average power dissipation in cmos circuits. and the value of dynamic power is determined by node capacitance, supply voltage, clock frequency and switching activity of cmos circuits. so most low power designs are achieved by reducing one or more those above parameters

    由於cmos電路的耗與cmos電路的負載電容,電壓,及開關活動性有關,因此在低耗cmos觸發器設計過程中,許多低耗設計技術都可以歸結到通過減小上面的參數來達到低耗的目的。
  18. Now, the programmable chip ' s clock becomes faster and faster, the capability of programmable chip is improved very fast also, so more complex function can be implemented in one chip. this design can implement as jpeg coding chip in fpga, it can be used as ip core to other designs

    隨著可編程晶元的不斷提高,晶元容量的不斷增大,可以在晶元上實現更復雜能,這又使可編程晶元的應用更加廣泛。本設計可以單獨作為編碼器在fpga上實現,也可以作為一個ip核嵌入到其他設計中去。
  19. The portable infrared press instrument has the following characteristics : has small volume and weight and carry easily ; use a keyboard to input orders and display the corresponding information on the lcd display for the sake of the user ' s convenience ; has big data capacity and can collect 30 press measure instruments all the data which have stored for a week ; show the real - time date and time ; communicate through the infrared with speed of 2400kbps ; has the intrinsically safe circuit and can be safely used under coal mine

    本文所研製出的紅外線壓力手抄器的主要特點是:體積小、重量輕、易於攜帶;使用鍵盤輸入命令,並在液晶顯示屏上給予相應的提示,極大地方便了使用者;數據容量較大,可一次採集30臺壓力測試儀一周內存儲的壓力數據;全日歷實顯示;紅外數據通訊能,傳輸速為2400kbps ;本安設計,可安全的應用於煤礦井下。
  20. Its intrinsic switching time is very short ; on the order of a picosecond. perhaps even more important is the low power dissipation ; superconducting circuits dissipate on the order of a microwatt per gate, a thousand times less than cmos circuits

    這種數字電子技術具有高速、低耗的特點,使用基於rsfq技術的邏輯電路的可達到幾百個ghz ,而耗只有0 . 3微瓦門。
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