時鐘數據 的英文怎麼說

中文拼音 [shízhōngshǔjù]
時鐘數據 英文
clock data
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 據 : 據Ⅰ動詞1 （占據） occupy; seize 2 （憑借; 依靠） rely on; depend on Ⅱ介詞（按照; 依據） according...
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  • 數據 : data; record; information
  1. A chronograph is a clock device for recording information according to the time of its occurrence.

    計時儀是一種記錄數據的時鐘儀表，它是按照數據出現的時間加以記錄的。
  2. Using domestic strained integrated resistor as weighing sensor, at89c52 single chip as control unit, combined with arithmetical magnification, analogtodigital conversion ( a / d ), real time clock, liquid crystal display ( lcd ), and series communication interface, a minitype automatic weighing lysimeter is developed. that made measurement of evapotranspiration become conveniently and effectively in studying on water use of crops

    為了方便、有效地測定植物的蒸散，為水分利用研究提供價廉物美、簡單易用的儀器，本研究利用國產的集成電阻應變式稱重傳感器，採用at89c52單片機作為控制單元，結合運算放大、模數轉換、實時時鐘、液晶顯示、數據存儲、串列通信等外圍介面電路，研製了小型自動稱重式蒸散儀。
  3. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  4. The analog signals are regulated to satisfy the system and analog - to - digital converter ( adc ) ; dsp is the core part and is connected with adcs, a controller of ethernet, a rs - 485 bus transceiver, a can bus transceiver and a clock. the real - time data is disposed by dsp and is transferred to the upper computer when the alarm is happened

    模擬信號調理模塊對輸入的信號進行調理，以達到系統和模數轉換器（ adc ）采樣的要求; dsp作為系統的核心部件，外擴了adc 、以太網控制器、 rs - 485總線收發器、 can總線收發器和時鐘晶元， dsp對實時數據進行處理，當報警發生時將實時數據通過以太網上傳給上位機。
  5. The bureau international des poids mesures ( bipm ) in france determines utc based on the time information from more than 200 atomic clocks located in more than 50 time service centres worldwide. the hko is now one of these centres

    位於法國的國際度量衡局根據全球五十多個授時中心的二百多個原子鐘的時間數據，訂定協調世界時，香港天文臺現在是其中之一。
  6. Early this year, the hko installed a high accuracy time transfer system which employed the global positioning system common - view method to provide time information of hko s atomic clock to bipm for utc determination

    香港天文臺於今年初安裝了一套高準確度授時系統，並利用全球定位系統共視方法（ globalpositioningsystemcommon - viewmethod ） ，向國際度量衡局提供天文臺的原子鐘時間數據，參與訂定協調世界時。
  7. In this paper, the design of a specific chip for circuit emulation based on ip is put forward and realized and the main functional modules and the key algorithms including an all - digital adaptive clock recovery method and a dynamic depth buffer algorithm are described in detail

    文章根據相關標準提出並實現了一種電路模擬專用晶元的設計方案，並對其中主要功能模塊和關鍵演算法作出了詳細說明，包括一種全數字的自適應時鐘恢復方法、動態深度緩沖演算法等。
  8. The clock recovery block of usb2. 0 transceiver macrocell consists of phase locked circuit, such as pll and dll ( delay locked loop ). this block use external crystal 12mhz sin signal to produce 60mhz, 120mhz, 480mhz clock signal, and can recover colock signal form date wave. it can support 480mbps ( hs ) and 12mbps ( fs ) word speeds as defined in usb2. 0 specification.

    目的是用鎖相環電路? pll和dll （延遲鎖相環）實現usb2 . 0收發器宏單元utm的時鐘恢復模塊。其中pll環路構成的時鐘發生器將外部晶振的12mhz正弦信號生成60mhz 、 120mhz 、 480mhz等本地時鐘信號。 dll環路依據本地時鐘信號對外部數據信號進行時鐘恢復。
  9. Based on these analyses, a more understandable structure of usb was established. secondly, the usb device controller framework was established based on the usb device controller function requirements on clock extracting, protocol layer and data management

    其次，針對usb設備控制器的功能要求，從時鐘提取、事件檢測、協議層、數據處理層通信等方面對其進行了結構設計和詳細設計。
  10. The key to the fft algorithm is the design of butterfly computation and that of the address logic. the whole schema is designed in the top - down design flow and described in the vhsic hardware description language ( vhdl ), basing on these, we do our research on reconfigurable technology. the result indicates that the data processing ability of reconfigurable system improved greatly

    結果表明，可重構系統在數據處理能力方面比以往的系統有了很大的提高，本設計實現的fft重構處理器可工作於60mhz下，完成一個16點fft需要132個主時鐘周期，完成32點fft需要324個主時鐘周期，而且具有一定可重構性，可以方便地將其運算點數進行擴展，或將其他的圖像處理演算法在實時處理系統中實現。
  11. Label for watches and clocks ; example for label - datas

    手錶和時鐘的標簽.標簽數據示例
  12. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  13. The developed apparatus can automatically measure evapotranspiration at setting up interval and memory the data through a 32 kilobyte data storage memory. measured data can be transmitted to personal computer by rs232 series communication interface. apparatus will be trigged at measurement time by a real time chip set in it

    該儀器通過實時時鐘晶元實現間隔採集動作的觸發及時間、日期的計數；利用液晶顯示器（ lcd ）進行顯示；使用它能在無人監管的工作環境下，定時進行蒸散測量並將測得數據自動保存到32k數據存儲器中；再通過rs232串列通訊介面將數據傳送到pc機進行進一步處理。
  14. Race an alarm clock. estimate the number of words in an article or book chapter and set a time limit on how long you should take to read it. set the alarm for that period of time. see if you can finish before the alarm goes off. grafually shorten your target time

    同鬧鐘競賽，算出一篇文章或書中一章的字數，然後規定你應該讀完的時間，根據規定的時間撥好鬧鐘，看看你是否能在鬧鐘響起來之前完成閱讀.逐漸縮短你的規定時間
  15. If the host pulls clock low before the first high - to - low clock transition, or after the falling edge of the last clock pulse, the keyboard / mouse does not need to retransmit any data

    如果在第一個高- >低時鐘跳變時， （或者在最後一個時鐘脈沖的下降沿之後）主機將時鐘拉低，鍵盤/鼠標不必重新傳輸任何數據。
  16. One of the most promising new technologies to help achieve that goal is a new breed of low - powered microprocessors that can vary the speeds at which they operate

    在執行復雜的計算任務，如連續處理大批的數字數據時，這種處理器以極高的速度，即"時鐘脈沖速度"運行。但是在執行要求較低的任務，如運行一個文字處理器或放音樂時，該晶元能減速。
  17. A drive method of unequalized clock counter in panel display which uses no dissimilarity @ subclass to achieve precision unequalized clock counter correction based on functions approximation theory is proposed. the new method is acquired based on the particular analysis results of the display drive design projects which adopted counter drive method in which the balance between the display image quality and the cost of drive circuit is given. finally, synthesis comparison examples are given

    針對目前以該方法為基礎普遍採用的不同技術方案進行詳盡的分析，根據分析的結果闡明了其在圖像顯示質量和驅動代價方面的優缺點，在此基礎上基於函數逼近理論提出了一種平板顯示器計數器非均勻時鐘驅動方法，該方法在計數器時鐘上採用非相異子集完成高精度的非均勻時鐘計數器校正。
  18. For a 12 - mb database, the read - load - find time jumps to well over a minute

    一個12 - mb的數據庫的讀入、裝載和查找時間增加到一分鐘。
  19. If all errors belong to single or multiple temporary 0 1 - error or stuck - at - error produced by one module, then these errors can be corrected effectively. the results obtained from the simulation validate the correctness of the cl - acl structure. analytic results show that the delay of the cl - acl structure is dramatically less than that of a dmr structure using alternating - complementary logic mode

    這些粒子所引起的干擾不僅將改變存儲單元的邏輯值，而且將導致邏輯電路產生瞬時輸出脈沖，如果這些脈沖在某個關鍵的時間段里產生，比如在時鐘或數據的變化過程中，那麼它們將間接地使其它電路的狀態產生變化。
  20. This paper gives a time - synchronization technique bases on gps time service signal which is used in broad band seismic recorder 。 by world coordination time offered by gps - - utc ( usno ), adjust local clock base on gps signal, gain high nicety clock signal, clock precision reachs 10 - 6 。 this clock is the time source of broad band seismic recorder, bring the whole seismic recorder works in same time base. 1pps time base with high stability can be used as in - phase, spring, time and start - stop of every collection mode, while the scale under second make a precise time mark to receive data of broad band seismic recorder

    針對接收機中gps信號的噪聲進行kalman濾波軟體處理， kalman濾波可以對gps信號與本地晶振時鐘的時差數據在大噪聲中進行平滑，在較短時間內估計出高精度的時差數據。系統消除了gps秒脈沖信號的ms級隨機誤差，把晶振秒脈沖的長期穩定度鎖定到gps信號的穩定度上;在gps信號失效時給出了可行措施，能夠保證在任何情況下產生一個穩定、高精度秒脈沖信號，誤差在1 s內。
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