柵偏壓 的英文怎麼說

中文拼音 [zhàpiān]
柵偏壓 英文
[電子學] bias; c bias; direct grid bias; grid bias; grid-bias voltage; [電學] gate bias
  • : 柵名詞(柵欄) railings; paling; palisade; bars
  • : Ⅰ形容詞1 (不正; 歪斜) inclined to one side; slanting; leaning 2 (只側重一面) partial; prejudi...
  • : 壓構詞成分。
  1. Source of electron gun grid bias

    電子槍柵偏壓電源
  2. For the demand of output swing, the bias is provided by high - swing cascode current mirrors

    為了獲得高輸出擺幅,設計低共源共電流鏡為運放提供置。
  3. It shows that the bias in the post - irradiation recovery period and the ratio of the interface state to the electron tunneling influence the recovery rate

    模擬結果表明:退火過程所加柵偏壓的大小以及隧道電子效應與建立的界面態所佔比例的不同影響器件的恢復率。
  4. The low insertion loss is achieved by optimizing the transistor widths and bias voltages, by minimizing the substrate resistances, and by dc biasing the transmit and receive nodes, which decreases the capacitances while increasing the p1db

    通過優化mosfet的寬及置電可以降低插入損耗。在版圖設計中通過增加襯底接觸降低襯底電阻,從而減小插入損耗。另外,為接收和發送端提供直流置可以降低p1db 。
  5. Secondly, the radiation effects of the system of silicon gate si / sio2 ( silicon gate nmos and pmos ) implanted bf2 are made a deep systematic study. especially, the relationship between threshold voltage shift ( vth and vit vot ) in radiated mos transistor and irradiation dose rate, irradiation dose, irradiation temperature, bias voltage, device structure as well as annealing condition is explored emphatically

    在此基礎上,對bf _ 2 ~ +注入硅si sio _ 2系統低劑量率輻照效應進行了深入系統的研究,著重研究了bf _ 2 ~ -注入mos管閾值電漂移( vth和vit 、 vot )與輻照劑量率、輻照總劑量、輻照溫度、置電場、器件結構以及退火條件的依賴關系。
  6. The model uses convolution theory and considers the bias change in the recovery period

    在整個退火恢復期,採用卷積模型並考慮了的效應。
  7. On the one hand, the design uses low voltage cascode op framework to improve its gain ; on the other hand, it applies self - bias and cascode structure to the whole sensing circuit. by using the improved method, we have successfully obtained low power consumption, low offset, high linear and high psrr ptat current generator under low power supply

    在電路設計上一方面改進運放結構,採用低共源共結構以提高其增益,另一方面整體傳感電路採用自置結構和共源共電流鏡結構,在低電源電下成功設計了低功耗、低失調、高線性度和高電源電抑制比的ptat電流產生電路。
  8. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電低功耗技術做了廣泛的調查研究,分析了這些技術的工作原理和優缺點,在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時,為了使輸入共模電范圍達到軌至軌,不是採用傳統的差動輸入結構,而是採用了nmos管和pmos管並聯的互補差動輸入對結構,並採用成比例的電流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中,電流鏡負載並不是採用傳統的標準共源共結構,而是採用了適合在低工作的低寬擺幅共源共結構;在輸出級設計時,為了提高效率,採用了推挽共源級放大器作為輸出級,輸出電擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計,採用了帶電流鏡負載的差分放大器設計了一個基準電流源,給運放提供穩定的置電流和置電,保證了運放的穩定性;並採用了帶調零電阻的密勒補償技術對運放進行頻率補償。
  9. Difference iterative method was used to estimate numerically director configurations in the nlc - bl037 cell in this paper. the refractive indices and phase retard of nlc in electric field was presented on the basis of the calculation of liquid crystal director distributions. then we analysed the diffraction phenomenon when the linearly polarized light was controlled by diffraction grating which was based on rectangular grating and sinusoidal phase grating models and we got it ’ s math model 。 finally we designed the nlc phase grating and we did the experiment to validate the theoretic calculation

    文中利用差分迭代法計算了向列相液晶bl037盒中指向矢分佈的計算,根據指向矢的分佈情況得到了向列相液晶的雙折射率分佈和非常光通過液晶盒產生的相位延遲隨電變化;並在矩形光和正弦相位光的基礎上,分析了入射振光通過液晶電控光所產生的衍射情況。
  10. In this paper, a three phases high - voltage power mos gate drive integrated circuit has been researched and designed successfully. it is a typical spic, which could be widely used in high power motor control and switching power supply applications. the design goal of the circuit are v0ffset ( max ) is 500v, ia ( m ~ ) is 1 a, the highest frequency of operation ( f ( ~ x ) ) is 100khz

    本文研製成功了一種可廣泛用於大功率電機控制、開關電源等應用中的spic電路?三相高功率mos驅動集成電路,其設計指標要求為:最高置電( voffset ( max ) )為500v 、最大輸出電流( i _ o ( max ) )為1a 、最高工作頻率為100khz 。
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