柵漏電流 的英文怎麼說

中文拼音 [zhàlóudiànliú]
柵漏電流 英文
gate leak current
  • 柵 : 柵名詞（柵欄） railings; paling; palisade; bars
  • 漏 : Ⅰ動詞1 （從孔或縫中滴下、透出或掉出） leak; drip 2 （泄漏） divulge; disclose; leak 3 （遺漏） le...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 流 : Ⅰ動1 （液體移動; 流動） flow 2 （移動不定） drift; move; wander 3 （流傳; 傳播） spread 4 （向壞...
  • 電流 : current; galvanic current; electric current; electricity; current flow電流保護裝置 current protec...
  1. Compared to other commonly referenced high - k materials, hfo2 is known for its stability on silicon and process compatibility. the fabrication and electrical properties of hfo2 and hfoxny gate are carefully studied. with the study on hfo2. we can receive a few significative conclusion : 1

    結果表明，與傳統的hf清洗的si表面相比， nh _ 4f清洗的si表面與hfo _ 2具有更好的熱力學穩定性，因而可獲得更低的eot和柵泄漏電流密度； 3 ）研究了濺射氣氛和退火工藝對hfo _ 2柵介質薄膜性質的影響。
  2. These problems boost the study of high - k materials as the alternatives of sio2 gate dielectrics. among all high - k gate dielectric materials, hafnium oxide ( hfo2 ) is being extensively investigated as one of the most promising candidate materials due to its superior thermal stability with poly - si, biggish constant and reasonable band alignment. our researches focus on hfo2 dielectrics

    高k柵介質材料已經被廣泛地研究來替代sio _ 2 ，以降低柵泄漏電流和改善可靠性，其中， hfo _ 2由於其較大的介電常數、較大的禁帶寬度、與si的導帶和價帶較大的偏置、以及與si的高的熱力學穩定性等特徵，被認為是最有希望的替代sio _ 2的柵介質材料之一。
  3. Based on the hydrodynamic energy transport model, the influence of variation of negative junction depth caused by concave depth on the characteristics of deep - sub - micron pmosfet has been studied. the results are explained by the interior physical mechanism and compared with that caused by the source / drain depth. research results indicate that with the increase of negative junction depth ( due to the increase of groove depth ), the threshold voltage increases, the sub - threshold characteristics and the drain current driving capability degrade, and the hot carrier immunity becomes better in deep - sub - micron pmosfet. the short - channel - effect suppression and hot - carrier - effect immunity are better, while the degradation of drain current driving ability is smaller than those with the increase of depth of negative junction caused by source / drain junction shallow. so the variation of concave depth is of great advantage to improve the characteristics of grooved - gate mosfet

    基於能量輸運模型對由凹槽深度改變引起的負結深的變化對深亞微米槽柵pmosfet性能的影響進行了分析，對所得結果從器件內部物理機制上進行了討論，最後與由漏源結深變化導致的負結深的改變對器件特性的影響進行了對比.研究結果表明隨著負結深（凹槽深度）的增大，槽柵器件的閾值電壓升高，亞閾斜率退化，漏極驅動能力減弱，器件短溝道效應的抑制更為有效，抗熱載流子性能的提高較大，且器件的漏極驅動能力的退化要比改變結深小.因此，改變槽深加大負結深更有利於器件性能的提高
  4. With the continued scaling - down of mosfet, the ultra - thin gate oxide causes some serious problems of devices. the ultra - thin sio2 dielectrics cause significant leakage current, consequently increases standby power of device. meanwhile, the reliability of gate dielectrics is also degraded

    當mosfet器件按比例縮小到70nm尺寸以下時，傳統的sio _ 2柵介質的厚度將需要在1 . 5nm以下，如此薄的sio _ 2層產生的柵泄漏電流會由於顯著的量子直接隧穿效應而變得不可接受，器件可靠性也成為一個嚴重的問題。
  5. In gan hemt drain pulse current collapse experiments, drain current under pulse condition collapsed about 50 % than direct current condition and the pulse signal frequency affected little on current collapse. when gate voltage is small, the relationship between pulse width and drain current is i0 ( + t / 16 )

    在ganhemt漏極脈沖電流崩塌測試中，發現脈沖條件下漏極電流比直流時減小大約50 % ;脈沖信號頻率對電流崩塌效應影響較小;當柵壓較小時，隨著脈沖寬度的改變漏極電流按i0 （ + t / 16 ）的規律變化。
  6. Under pulse condition, charging and discharging of surface states between gate and drain induce gan hemt current collapse

    脈沖條件下， ganhemt電流崩塌效應主要由柵漏之間表面態充放電引起。
  7. In this paper, the theory of negatively charged surface states is used to investigate dynamic breakdown characteristics and the increase of gate - drain breakdown voltage as well as the reduction of saturated drain - source current after sulfur passivation. the measure which can improve the stability of sulfur passivation is proposed

    本論文通過對gaasmesfet擊穿機理和硫鈍化機理的研究，用負電荷表面態理論，解釋了gaasmesfet動態擊穿特性及硫鈍化后柵漏擊穿電壓增大、源漏飽和電流減小的機理，提出了改善硫鈍化穩定性的措施。
  8. In gan hemt gate pulse experiments, drain current under pulse conditon collapsed about 47 % than direct current condition and the pulse width affected little on current collapse. the relationship between drain current and pulse frequency is ncoxw [ m + ( n + k ? ) vgs + ( n + k ? ) vgs2 ] ( vgs - vth ) 2 / l

    在ganhemt柵極脈沖電流崩塌測試中，觀察到柵脈沖條件下漏極電流比直流情況下減小了47 % ;隨著信號頻率的改變，漏極電流按ncoxw [ m + （ n + k
  9. Secondly, the transient characteristics of fn tunneling and hot hole ( hh ) stress induced leakage current ( silc ) in ultra - thin gate oxide are investigated respectively in this dissertation

    其次，本文分別研究了fn隧穿應力和熱空穴（ hh ）應力導致的超薄柵氧化層漏電流瞬態特性。
  10. With the research on hfoxny gate dielectrics, it can reduces leakage current and increase crystallizing point ; our research can help to realize the leakage current mechanism and silc effect of hfo2, futher more it can offer us direction on optimize the fabrication process

    結果表明，與hfo :相比，氮化的hfo :具有小的漏電流。我們的研究結果有助於進一步了解hro :柵介質的泄漏電流機制和silc效應的特徵，為進一步優化hfo :高k柵介質的制備工藝提供指導。
  11. We researched fabrication at different asputtering and annealing atmosphere, the different process conduced different electrical properties. we can conclude a higher annealing temperature and higher proportion of o2 during reactive sputtering favors the improvement of electrical performances of hfo2 dielectrics ; 4. the analysis of i - v curves of these devices displays different leakage current mechanism under different area of applied bias - voltage ; as to silc. there are different leakage current mechanism at influence of sil. c ; 5

    研究表明，在優化工藝條件下制備的hfo _ 2介質層中，襯底注入條件下由於其較低的體和界面缺陷密度，漏電流的輸運機制主要以schottky發射為主; silc效應導致hfoz / si界面缺陷態的增加，從而使得襯底注入條件下，柵泄漏電流機制不僅有schottky發射還有f一p發射機制起主要作用; 5 ）初步研究了氮化的hfo : （ hroxny ）柵介質的電學特徵。
  12. Based on the hydrodynamics energy transport model, the degradation induced by donor interface state is analyzed for deep - sub - micron grooved - gate and conventional planar pmosfet with different channel doping density. the simulation results indicate that the degradation induced by the same interface state density in grooved - gate pmosfet is larger than that in planar pmosfet, and for both devices of different structure, the impact of n type accepted interface state on device performance is far larger than that of p type. it also manifests that the degradation is different for the device with different channel doping density. the shift of drain current induced by same interface states density increases with the increase of channel do - ping density

    基於流體動力學能量輸運模型，對溝道雜質濃度不同的深亞微米槽柵和平面pmosfet中施主型界面態引起的器件特性的退化進行了研究.研究結果表明同樣濃度的界面態密度在槽柵器件中引起的器件特性的漂移遠大於平面器件，且電子施主界面態密度對器件特性的影響遠大於空穴界面態.特別是溝道雜質濃度不同，界面態引起的器件特性的退化不同.溝道摻雜濃度提高，同樣的界面態密度造成的漏極特性漂移增大
  13. An hfo2 layer with less than 3. 5nm eot was obtained and show good electrical properties. the gate leakage current at a gate voltage bias of iv is less than 10 - 7 a / cm2

    研究顯示，濺射氛圍中增加氧分壓和在氧氣氛退火有助於減小hfo _ 2柵介質的漏電流。
  14. In fet devices, the presence of an electrical field at the gate moderates the flow between the source and drain

    在fet器件中，柵極電場的存在會調節源極和漏極之間的電流。
  15. The experiments show an room temperature in the course of reactive sputtering conduces to restraining the surface reaction between hf02 and si layer ; 2. we studied different surface progress. comparable with conventional method, the surface with nh4f cleaning step have superior thermal stability with hfo2, nh4f cleaning step is introduced can reduces leakage current and eot ; 3

    柵泄漏電流的減小可歸于氧空位缺陷的減小，即高的濺射氧氣氛和氧氣氛退火有助於減小hfo _ 2柵介質中的氧空位缺陷； 4 ）研究了反應濺射制備的hfo _ 2柵介質漏電流機制及其silc效應。
  16. With the pentacene acting as the active layer, the diode of ito / pentacene / al, the vertical organic thin - film field - effect transistor, the organic thin - film ambipolar field - effect transistor and the organic thin - film double - field - effect transistor are fabricated

    提出雙柵絕緣層結構全有機薄膜場效應晶體管，達到了減少器件柵的漏電流、降低器件工作電壓和提高器件工作電流的目的。
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