片上系統 的英文怎麼說

中文拼音 [piānshàngxìtǒng]
片上系統 英文
soc: system on a chip
  • 片 : 片構詞成分。
  • 上 : 上名詞[語言學] （指上聲） falling-rising tone
  • 系 : 系動詞（打結; 扣） tie; fasten; do up; button up
  • 統 : Ⅰ名詞1 （事物間連續的關系） interconnected system 2 （衣服等的筒狀部分） any tube shaped part of ...
  • 片上 : katagami
  • 系統 : 1. （按一定關系組成的同類事物） system 2. （有條理的;有系統的） systematic
  1. The double - start positioning system is an all - weather and regional satellite positioning system, developed independently by our country. this paper discusses the cpu implementation of the dispread subsystem in the double - start positioning system to carry out the main control of the system and to finish the information frame processing. the hardware platform we used is based on cirrus logic ' s ep7312 develop board

    在北斗衛星地面用戶機解擴分機的研製中，其主控模塊的設計開發採用目前流行的基於arm架構的嵌入式微處理器設計思想，以cirruslogic公司ep7312嵌入式處理器為核心的片上系統soc設計開發， ep7312處理器是專門為低成本、超低功耗的應用設計的。
  2. With argumentation and comparing the difficulty of developing in different ways, in multimedia communication the terminal make up with mpeg - 4 encoder and decoder based on vw2010 chip, main controller based on x86 core and pc compatible stpc soc chip, ethernet adapter based on rtl8139. and this hardware platform can run linux operation system. the following works are done by auther. 1. participate in designing the project of multimedia terminal

    經過論證和比較，權衡了開發難度和系統性能，在多媒體視頻會議終端設計中採用了基於x86內核片上系統晶元stpc的主控制器模塊，基於vw2010晶元的mpeg - 4音視頻編解碼器模塊，基於rtl8139晶元的10m / 100m以太網適配器模塊的硬體架構，主控制模塊運行linux操作系統，作為多媒體終端的軟體運行環境及軟體開發環境。
  3. Now, the increase of complication in structure and fast - breaking of soc design method make some arithmetic easy to realization in hardware

    由於asic的集成度越來越高，以及片上系統（ soc ）設計方法的迅速發展，使得許多以前無法在硬體上實現的演算法現在很容易實現。
  4. System - on - a - chip ( soc ) is a complex integrated system. it is impossible for a designer to complete the reliable and optimum implementing without intellectual property ( ip ) reuse within the limited time

    片上系統（ soc ）晶元是一個復雜的系統，為了在規定時間完成設計，並提高設計的可靠性，只有依賴基於知識產權（ ip ）復用的soc設計方法。
  5. The method of design of system on chip ( soc ) based on the field program gate array ( fpga ) is also introduced

    並對課題中採用的基於現場可編程門陣列（ fpga ）的片上系統（ soc ）設計方法進行了介紹。
  6. This paper introduces the general design method of soc ( system on a chip ) using eda tools, gives some cases of ip, then implement a real system on epm7128slc84 - 15, a chip of altera company, this system including : scan and recognition of matrix keyboard, calculation of add, sutu multiply under the control of state machine, the display of result on computer screen

    本文首先介紹了用eda工具設計片上系統的一般方法，給出了幾個ip ，然後在altera公司的晶元epm7128slc84 - 15上實現了一個soc實例，該實例包括：對矩陣式鍵盤的掃描、識別，在狀態機控制下進行加、減、乘法運算，以及結果在計算機屏幕的顯示。
  7. The second part studies the characteristics of cdma2000 1x reverse link, and implements a softcore design of the cdma20001x rtl soc with hdl ( hardwire desciptionin language ) verilog in accordance with the is - 2000 specifications. the model include the softcore of a spread spectrum modulation and a simple 8 - bit processor. as the same time simulate all the parts of the soc softcore with software modesim

    ，本文的第二部分認真的研究了cdma20001x的反向鏈路的特點，設計反向鏈路的擴頻調製片上系統方案。用硬體語言verilog設計cdma20001x的擴頻調製片上系統的ip軟核。其中包括擴頻調制部分和一個8位的cpu設計。
  8. The subject of this dissertation is the research on the design for testability in the design environment of system on a chip

    本論文的研究課題為片上系統（ systemonachip ，簡稱soc ）環境下的可測性設計方法學研究。
  9. Research on electro - hydraulic servo control for construction robot based on system on chip

    基於片上系統的工程機器人電液伺服閥控制器的設計
  10. The system of new type intelligent instrument is integrations of a lot of new theories and technologies. this paper take a thorough research on the theory of fault - diagnosis in intelligent instrument, embedded internet, in - system programming, emit and soc ; and in base of integrations of a lot of new theory and technologies, this paper inaugurated the system of new type intelligent instrument

    新型智能儀器系統是多種理論和新技術的綜合，本文全面地研究了智能儀器故障檢測技術原理、在系統可編程技術原理及其模擬/數字器件、嵌入式internet原理以及emit （嵌入式internet技術）和soc （片上系統systemonchip ）技術，在綜合各種原理和技術的基礎上，通過深入地分析和綜合，提出並實現了新型智能儀器系統。
  11. With deep submicron technology, an embedded system can be integrated into a single chip and becomes " system on chip " for many applications

    隨著微電子技術中的深亞微米技術的發展，嵌入式系統可以被集成到一塊晶元上，形成片上系統「 soc 」 。
  12. The clb bus is a kind of on - chip system bus which is usually used to connect ips with high speed and high data width. the peripheral bus that conform the pvci standard usually used to connect ips with low speed and low data width

    Clb總線是一種片上系統總線，一般用來連接高速度、高數據寬度的ip 。而符合pvci標準的外設總線上連接的往往是低速度、低數據寬度的ip 。
  13. Ieee1451 protocol family develops the definition of a common object model for the components of a networked smart transducer and the software interface specifications to these components

    在基於片上系統晶元ad c812開發的智能傳感器模塊平臺上，具體介紹其軟體體系設計的思想及實現。
  14. Duties : responsible to circuit analysis upon analog and mixed - signal ics

    職責：負責片上系統的電路分析。
  15. After studying the requirements of the digital servo controller and the protocols of mil - std - 1553b, this paper brought forward a design based on the technology of system on programmable chip ( sopc in the following )

    本文分析了數字式伺服控制器的設計要求，研究了mil - std - 1553b總線協議，提出了基於可編程片上系統（ sopc ）技術的總體設計方案。
  16. The research work and its conclusion have referenced and directive meaning to dsl time domain equalizer and adsl transceiver system on a chip design

    本文的研究工作及結論對于進行dsl系統時域均衡器設計及adsl收發器片上系統設計有參考和指導意義。
  17. This is one kind project of hardware multiplexer based on the high - performance system on a programmable chip ( sopc ). in the project author integrate with the software and the hardware on a field programmable gate array ( fpga ), not only simplifying the overall system design, moreover realizing stably, high speed, low cost multiplexer ’ s design. the dissertation carry on three verification step that include function verification 、 time verification and prototype verification to guarantee each ip can work normally to satisfy the system performance requirement. then author introduce the realization of the multiplexer in detail, as well as the test and the debugging questions met in practice and solution of the questions

    本方案是一種基於可編程片上系統（ sopc ）的硬體復用器設計方案，其特點是將系統的軟體和硬體集成在一款現場可編程門陣列（ fpga ）上，使用該方案不但簡化了整個系統，而且實現了穩定、高速、低成本的復用器設計。對系統中各個功能模塊的整合和驗證採用功能模擬、時序模擬、原型驗證三個步驟進行，保證系統中各個功能模塊可以正常工作，並滿足系統的性能要求。然後詳細介紹了復用器的實現，以及測試和調試中遇到的問題及解決方法。
  18. The thesis researchs the basic theory of digital hdtv test pattern signal generating system and its realization based on soc ( system on chip )

    論文研究了數字高清晰度電視測試圖案信號發生系統基本原理及其基於片上系統（ soc ， systemonchip ）的具體實現。
  19. The design of cdma terminal chip is a very actual value and extensive application problem in the field of cdma technology application. with the development of micro - electronics technology, the design of integrated circuit has stepped into the age of soc ( system on chip ), which provide a brand - new method for cdma communication system project. in this paper, a design of cdma2000 1x spread modulation soc has be researched with large scale field programmle gate array device, and make a certain results

    Cdma終端晶元設計是cdma技術應用領域中一個具有重要實際應用價值和廣闊應用前景的研究課題。隨著微電子技術的發展，集成電路設計進入了片上系統時代，這為cdma移動通信系統設計提供了一個全新的技術手段。本文將基於cdma技術，用大規模可編程邏輯器件對第三代移動通信cdma20001x的擴頻調製片上系統設計做了進一步的探討和研究，並取得了一定的成果。
  20. This dissertation has contributed to designing soc using standard on - chip buses, and realized the bus system of asb and ahb, which is convenient for adding new cores in function development

    本論文為採用標準片上總線實現片上系統積累了一定的經驗，並建立了asb和ahb兩種總線系統模型，以便於以後在系統功能擴展時加入新的模塊。
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