相序電路 的英文怎麼說

中文拼音 [xiāngxùdiànlù]
相序電路 英文
phase-shift circuit
  • 相 : 相Ⅰ名詞1 （相貌; 外貌） looks; appearance 2 （坐、立等的姿態） bearing; posture 3 [物理學] （相位...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. Monitor apparatus can measure valid value of three phase voltage and current, power factor, three phase disequilibrium, instant flecker of short time and harmonic without twenty, degree and harmonic distortion total. the paper are laid on the following. ( 1 ) master plan and function of circuit, ( 2 ) hardware design including circuit and principle of a / d conversion, phase lock, liquid crystal display and keystroke and so on, ( 3 ) design of system software including digital filtering, fft, a / d conversion and monitor interface of pc, ( 4 ) system test

    監測儀能夠完成包括三相電壓、三相電流的有效值、功率因數、三相不平衡、電壓短期閃變、以及20次內的諧波、諧波相位、諧波失真總量等的測量。論文重點介紹了以下幾部分： （ 1 ）電路的總體設計和功能； （ 2 ）硬體設計，包括a d轉換、鎖相環、液晶顯示和按鍵輸入等原理和電路。 （ 3 ）系統軟體設計，包括a d轉換、 fft 、數字濾波等程序的原理和演算法以及上位機監控界面的設計； （ 4 ）系統測試。
  2. There is great change of negative current component when it happens the line - open fault. it is marked as the occurrence of the fault. and it can be concluded the phase characteristic of negative current in the line. in the transient course, there are plenty of harmonics in the fault line. through the transient analysis, it is drawed that the amplitude of each harmonic in fault phase is greater than other phases. harmonic current in fault line is far greater than other normal lines

    發生斷線故障以後，線路中會出現負序電流的突變，可以作為故障啟動判斷的標志，並且通過分析得出了故障時負序基波電流的相位特點。在故障暫態過程中，故障電流中含有大量豐富的諧波成分，各次諧波在故障期間有突變，並且衰減很快。
  3. And the phrase circuit and program sketch map are given

    設計了相位測量電路及程序框圖。
  4. The chip simulation network laboratory system this paper disguessed is a distribute network simulation system based on lan. the system ' s architecture is a c / s of three lays. the front platform are the chip simulation network system application program terminer ; the middle lay is a dcom server, it ' s duty is to deal with the communication and data transmission between the terminer and then database server, and to execute the logical operation. the application program just connect with the middle lay and get data from it, the connection and operation with database server will be managed by the dcom server. the duty of database server is to access and backup the final data

    具體是由位於網路各個終端的晶元模擬網路實驗系統應用程序為前臺；中間層為dcom應用程序服務器，負責處理前臺應用程序與后臺數據庫的通信和數據傳輸，並執行業務邏輯，前臺應用程序只需要與應用程序服務器建立連接，在中間層操作數據即可，與后臺數據庫的連接和操作由應用程序服務器來統一管理操作。后臺數據庫只負責數據的存取操作。本論文實施的晶元模擬網路實驗系統模擬了主要的邏輯電路器件， 8088cpu ，存儲器，寄存器，數據總線，地址總線和控制總線，及其它相關晶元。
  5. The design with this protection technology is to directly burn related data that must be referred to, determined, or a certain program needs to be executed into the interface card s integrated circuit. when users try to perform the program, they must insert the interface card into the pc s interface card socket before being able to perform the program

    這種保護技術的設計方法是將程序執行中所必須參考或判斷的相關數據，或者某段必須執行的程序，直接燒錄于適配卡的集成電路內，當使用者要執行程序時，必須將適配卡插於pc的適配卡插槽上，然後才可以執行程序。
  6. The control system of auto lensmeter is designed, including the drive circuit and restoration circuit of step - motor. the corresponding software is designed and debugged for step - motor based on the control principle of dsp

    對全自動數字查片儀的控制系統進行了設計，包括步進電動機的驅動電路和復位電路，並根據dsp控制原理設計了相應的驅動程序。
  7. It includes four criterions of locating fault point ? “ transient zero sequence current amplitude law ”, “ stable base wave zero sequence current phase law ”, “ stable seventh harmonic zero sequence current phase law ” and “ s injection law ”. pointing out how the law locate the fault point to minimal fault section by applying these criterions gradually. the law will not only make up the blemishes existing in current methods for single - phase fault location in small current grounding system, but also locate the fault point to minimal fault isolating unit on fault line

    該方法通過將所包含的四個定位判據- 「暫態零序電流幅值法」 、 「穩態基波零序電流方向法」 、 「穩態7次諧波零序電流方向法」和「 s信號注入法」 -進行有選擇地遞進使用，不僅有效彌補了目前已有小電流接地系統單相接地故障選線的缺陷，更將故障定位在故障線路最小故障區段。
  8. The whole correlation - inheritance coding circuit system is designed, simulated and verified in verilog hdl on the candence systems

    採用了硬體描述語言verilog對整個相關繼承矢量量化圖像編碼電路系統在cadence系統上進行了西安理工大學碩士論文設計、模擬及時序驗證。
  9. Fluid power systems and components. fluid logic circuit. part 3 : symbols for logic sequencers and related functions

    液壓流體動力和部件.液力邏輯電路.第3部分:邏輯程序裝置和相關功能的符號
  10. Unified power flow controller ( upfc ) is one of the most powerful and most promising controllers of facts. if we use upfc to control the transmission parameters, terminal voltage, line impedance and phase angle in normal situation and use it to compensate zero sequence and negative sequence currents when one of transmission lines is cut off, we can implement two phases operating in high voltage transmission lines, which can improve stability and reliability for the transmission system

    統一潮流控制器（ upfc ）是功能最強、最具發展潛力的靈活交流輸電系統（ facts ）控制器之一，如果在常規條件下，用upfc實現輸電線路的電壓調節、移相、潮流控制、阻尼振蕩等功能，在發生單相永久性接地或單相斷路故障時，由傳統的三相跳閘改為單相跳閘，用upfc的並補來濾除兩端系統的零序和負序電流，用upfc的串補來提高輸電線的傳輸功率，以實現兩相長期運行，那麼輸電系統的穩定性、可靠性將大大提高。
  11. There is difference frequency measurement requirement for every part of pid regulating, difference between dynamic quality and static quality in response time and accuracy. according to these, it use the interrupt functions and high - speed counter of the simens s7 - 200 plc cpu226 basic unit and some peripheral circuit to measure frequency ; in software designed, the procedure frame of hydraulic - turbine governor and disperse process of parallel pid are analyzed, an improved pid algorithm is adopted to realize a pid regulation mode with variable structure and parameters ; the mechanical liquid - pressure system of the hydraulic - turbine governor is with electric - hydraulic converter unit of step motor. according to the drive character of five phase of response step motor, a variable frequency regulated voltage driver unit is designed in order to realize interface between plc and driver of step motor

    本文利用s7 - 200plc自身的特點設計了頻率測量單元，根據pid調節各個環節的特點，以及調速器動態特性、靜態特性對頻率測量的實時性和精度要求的不同，利用s7 - 200plc基本單元中內置的高速計數器以及相應的外圍放大整形、分頻電路，實現了水輪發電機組頻率的測量；在軟體上，對微機調速器的整個程序框架、並聯pid的離散化過程進行了分析，選用改進的pid演算法實現了變參數、變結構的pid調節模式；調速器的機械液壓隨動系統具有步進電機電液轉換元件，採用五相反應式步進電機，根據其驅動特性設計了變頻調壓驅動器，實現plc與步進電機驅動器之間數字介面。
  12. Generally, single phase grounding fault can cause both high phase current and zero sequence current. proper grounding protection set can act reliably and cut off fault

    一般地，單相短路將產生很大的故障相電流和零序電流，相應的接地保護裝置將能可靠動作從而將故障切除。
  13. As a result, this design accomplishs the function of circuit, which not only can satisfy the high speed image data transmission of large screen system and improve the performance of circuit, but also increase the flexibility of circuit design. in the design, it is possible to act hardware description language procedure according to the practical application demand, instead of revising hardware design of the circuit, which reduce the design cycle and the cost

    所以，本課題運用可編程邏輯器件來完成電路功能，不僅能夠滿足大屏幕系統高速圖像數據傳輸對速度的要求，改善了電路性能，而且增加了電路設計的靈活性，設計中可以根據實際應用的需求靈活修改相應硬體描述語言程序，而不需要修改電路硬體設計，縮短了設計周期，降低了成本。
  14. Now, with the rapid development of computer and electronics, there have been a great progress in the field of input / output device technology. among this field, pci has been a current standard interface of pc. and in order to accommodate the development of operating system, wdm has been a driver model adopted by industry generally. at the same time, in the respect of sensor ’ s application, a high precision and high integrated incremental rotary encoder has been an outstanding one among the displacement sensors. meanwhile, eda technology and cpld / fpga chip applied in the signal processing circuit are approved by a great number of engineers who are engaged in designing the electronic device

    目前，隨著計算機技術和電子技術的飛速發展， i / o設備介面控制技術領域有了長足進步。其中， pci介面成為主流的微機標準介面，而與操作系統平臺的發展相適應， wdm已成為業界普遍採用的驅動程序模式;同時，在傳感器應用方面，高精度、高集成的增量式旋轉編碼器已是位移型傳感器中的佼佼者，而eda技術和cpld / fpga器件在信號處理電路中的應用被廣大電子設計人員所認可。
  15. In the design of this project, the author has participated in the following works : the system design, chips selected, and making schematic circuit diagram of the interface hardware, and pcb design 、 debug, and the fpga control - program design, system testing and debugging, and some drivers of wince. this paper will introduce the principle of the dvb - t series standards firstly, then the sketchy design of the system will be stated

    本人主要從事系統設計，接收板硬體原理圖及印製電路板（ pcb ）設計製作並調試， fpga控製程序設計， wince部分驅動程序開發和系統聯調等工作。本文在介紹數字地面電視廣播（ dvb - t ）相關標準的基礎上，闡述了系統總體設計，軟硬體實現具體方案與原理
  16. Tangyin substation is an important substation which has two transformer of 120mva, eight 220kv lines and three 110kv lines. tangqian line is a 110kv line specially for traction transformer substation. because traction load is high - power nonlinear and asymmetry. it will produce much harmonic and negatvie sequence current, which have done harm to compensation capacitors of tangyin substation. in recent years, the tang6c capacitor often interrupted and in 2001 july the tang7c capacitor ' s discharge pt exploded

    湯陰變電站是豫北一座樞紐變電站，有2臺120mva的主變， 8條220kv線路和3條110kv線路，其中的湯牽線是專為牽引變電站供電的110kv線路。由於電力機車屬于大功率的非線性負荷，且三相不對稱，在其運行過程中必然會產生較大的高次諧波和負序電流。
  17. Flip - flop is the core of sequential circuits, this dissertation designed a synchronous set - reset edge - trigged jk flip - flop based on rt quantum devices, the jk flip - flop has strong function and high speed, and also riches the types of flip - flops in quantum circuits

    所設計的jk觸發器功能強，且與傳統的觸發器相比，基於rt量子器件的邊沿型jk觸發器具有量子器件的功耗低、速度快、電路簡單等特點。本文設計的jk觸發器豐富了量子電路中觸發器的種類，使得量子時序電路的設計更為靈活。
  18. Its innovation is to extend existed fanout - free region pwtitioning methods of combinational circuits to synchionous sequentia1 circuits, and combines fanout source fault simulation and critical path tracing. experimental resu1ts reveal that the efficiency of it is better than that of generic word - level fault parallel fs algorithms

    該演算法的創新在於擴充了現有的組合電路無扇出區劃分方法，使之對時序電路適用，並把它與扇出源故障并行模擬和臨界路徑追蹤方法相結合。
  19. Waveform simu1ation is done in combinat ion circuit and sequence circuit for val idat ing if the method of expressing waveform by hdl is practicabi1ity. at the same time, for improving the speed of waveform s imu1at ion, some key problems and used ari thmet ic appeared in waveform simulation are exp1ained in detai 1

    為了進一步地驗證硬體描述語言表達波形方法的有效性，結合組合電路和時序電路進行波形模擬，並對此過程中涉及的關鍵問題與相應的演算法進行了詳細的論述。
  20. We first propose and implement a sequential word - level pattern parallel fs algorithrn for synchionous sequential circuits. differing from other similar algorithins, it utilizes the relative independence of every fault test sequence generated by the g - f two - value tg algorithm, pwtitions and dynamically mounts test pattem, avoids redundant simulation for added synchlronous sequence, and gets better results

    首先提出並實現了一個新的同步時序電路單機字級測試碼并行fs演算法，該演算法與現有同類方法的不同在於，利用確定性g - f二值tg演算法的每個故障測試序列之間的相對獨立性，對測試碼進行分解並動態組裝，避免了對添加的同步序列的冗餘模擬，效果較好。
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