硬加法器 的英文怎麼說

中文拼音 [yìngjiāfǎqì]
硬加法器 英文
hard adder
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 法 : Ⅰ名詞1 （由國家制定或認可的行為規則的總稱） law 2 （方法; 方式） way; method; mode; means 3 （標...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 法器 : [宗教] musical instruments used in a buddhist or taoist mass
  1. Abstract : radiate thermometer uses a high definitive operation circuit in the modulation and linerization of weak optical signals. the theory of colorimetry was used in measuring the temperature. analogic channel and digital interfaces were added in order to expand the instrument. a kind of double channel ' s photocolorimeter including its hardware and software is introduced

    文摘:輻射測溫計採用高精度運算電路，對光弱信號進行調制和線性化處理，運用比色法原理對溫度進行檢測.為了便於儀器擴展，增加了模擬量輸出和數字介面，並對光纖式雙通道比色高溫儀的硬體與軟體的關鍵部分作了簡要介紹
  2. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  3. We select ni / cr alloy resistor as element together with ceramic embedding hearth ; select small flat - and - disc heat - even hubby ceramic sample holder, select ni / cr & ni / si thermoelectric couple ( type k ) as thermoscope with threads 0. 5 mm in diameter which is installed in the middle of the holders symmetrically ; select aluminum silicate fire - retardant fiber as materials for heat preservation ; design some hardware, for example temperature controller & transporter, signal amplifier etc ; design controlling curve to heat stove ; and introduce the method of least squares nonlinear regression and subsection function to deal with data. in order to obtain the reasonable operation conditions and operation curve, we have also done many theory analysis and experiment discussions

    通過理論和試驗探討，選用鎳鉻合金電阻絲作為加熱元件，配以陶瓷質埋入式爐膛；選用陶瓷質小尺寸扁平?圓盤均熱塊體型樣品支持器；選用0 . 5mm絲徑鎳鉻?鎳硅熱電偶（ k ）作為測溫元件；熱電偶對稱安置在樣品支持器容器的中部；選用硅酸鋁耐火纖維作保溫材料；合理選用和設計了溫度控制器、溫度變送器、信號放大電路等硬體；採用升溫曲線來控制爐膛供熱過程；採用最小二乘法非線性回歸與分段函數相結合的曲線模擬方法，進行圖形處理。
  4. Due to the hardware characteristic ' s limitation, such as the poor speed of a / d, d / a conversion and dsp process, the most part of sr system adopt middle course. that is to say, by using the special digital converter or running relevant arithmetic, it converts the radio signal to intermediate frequency signal and completes the base - band signal process that is n ' t the veriest sr and is named " software defined radio ( sdr ) "

    由於受到硬體性能如a d 、 d a及dsp晶元處理速度的限制，目前的軟體無線電系統多採用折中的實現方案，增加專用的數字變頻器或者運行數字變頻演算法，將射頻信號變頻到中頻，然後再進行基帶信號處理，這樣的軟體無線電系統又被稱之為「軟體定義無線電」 ，它並不是真正意義上的軟體無線電。
  5. Thirdly, the paper discusses the driver of the peripheral equipment, how to port the uc / os - n and uclinux, h. 323 protocol and the application of the system in the digital speech classroom. also some software and hardware measure are adopted to enhance the system stability. at last, the shortcoming and the something to be improved are given. dsp can be used to realize real - time speech coding algorithm, and after porting ( ac / os - n, arm can manage the keyboard, the lcd and the ethernet peripheral etc. then the embedded network system with specific purpose can be used in others fields, such as pda, set of top, web tv, ect

    在實際設計實現中，為提高系統軟、硬體整體穩定性和可靠性，使用了以下幾種方法： （ 1 ）低電壓復位、抗電源抖動能力、增加時鐘監測電路、抗電磁干擾能力、散熱等技術； （ 2 ）多層pcb設計，線路板結構緊湊，電源部分採用數字5v 、 3 . 3v 、 3v 、 1 . 8v和模擬5v多電源供電； （ 3 ）選用表面貼和bga封裝的器件； （ 4 ）按照軟體工程的要求進行系統分析，規劃系統框圖、流程分析、模塊劃分，減小了不同模塊的相關性，從而最大限度避免了錯誤的發生。
  6. In the past, a computer event recorder had to exactly match the hardware, and it could provide only limited functions. the users also had to spend much time to facilitate the operation ( dawkin, 1971 ; white, 1971 ; noldus, 1989 ). nowadays users only need to devote themselves to writing software, and they can ignore the compatibility issue of hardware because of improvements in computers

    以往的電腦事件記錄器由於電腦不普及，必須密切的配合硬體，不但昂貴且功能受到很大的限制，使用上非常不方便，往往必須花相當多的時間來學習操作;現今由於電腦軟體和硬體的改良進步，使研究人員得以專心於軟體的寫作，而不必擔心硬體無法配合，而且利用軟體來記錄行為其功能可以多樣化而容易配合使用者的需求，一般操作過電腦的人可以立即進入情況，無須特別的訓練，可使得動物行為的研究更加方便而有效率。
  7. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  8. After that, it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler. moreover, this paper explores the method of design the floating - point arithmetic unit. referring to the ieee754 - 1985 standard for binary floating - point arithmetic, the algorithm and the behavior description of floating - point adder and multiplier is given, and the simulation and verification is shown at the end of this paper

    此外，本文還對處理器的浮點運算單元設計做了初步的研究，以ansi ieee - 754浮點數二進制標準為參考，借鑒了經典的定點加法器和乘法器的設計，嘗試性的給出了浮點加法單元和乘法單元的實現模型和行為級上的硬體描述，並對其進行模擬和驗證。
  9. It ' s also a lot faster in case your second monitor doesn ' t have hardware acceleration, because technically, the rendering only happens off - screen on the first monitor ' s device

    與此同時，由於你的第二個顯示器不需要硬體加速，這個辦法還能讓你的機器快很多。因為從技術上說，渲染過程只在第一個顯示設備外悄悄進行。
  10. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  11. It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design

    它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：採用分離的指令和數據cache （哈佛結構） ，五級流水，硬體乘法器和除法器，中斷控制器， 16位的i / o埠和靈活的內存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。
  12. First this thesis discusses the development of the virtual instrument, and the method of developing the real time software ; then designs a interrupted virtual driver, deduces and programs the realtime arithmetic of wanderazimuth strapdown inertial navigation, develops strapdown inertial navigation realtime software based virtual instrument with object - oriented programming language. the software is able to display multi navigation parameter and is able to be added the extensible function

    論文討論了虛擬儀器技術的發展與現狀，研究了windows98平臺下實時性軟體的設計方法，設計了基於硬體的中斷虛擬驅動程序，推導和編程實現了游移方位坐標系捷聯式慣性導航系統計算機實時導航演算法，利用面向對象的可視化開發語言開發出基於虛擬儀器的捷聯式慣性導航實時軟體。該軟體能夠顯示多個慣性導航參數，具有故障報警顯示功能，根據需要可以增加新的顯示功能。
  13. Plc, robot and cad / cam are called the three major pillars in the modem factory automation. plc, as the head of the three, has become the leading basic automatic equipment in the field of the industry control in the early 1980s " but as a matter of fact, plc being with the lack of friendly man machine interface, rnakes no close relationship between human and machineometimes it even can not be promoted and applied in some fields aiming at the situation mat those imported products are too expensive while domestic products are of rare famous brands, a plc man - machine interface - plc monitor is developedthis paper systemically introduces the developing procedure for the whole system, including how to design hardware and software system. especially emphasizing plc communication protocol. real time message accessing, lcd controller instruction set, definition of data construction for message & tag screens and how to display thern, assignment of internal resource of cpuealization in software among plc & manitor, file format defining a nd download of user data, etcplc monitor will compensate some weakpoints of plc, and extend the application rangeimultanneously enhance the performance of plc and increase the attached value of mechanical machines, undoubtedly it will see hight market prospect

    針對人機界面進口產品的高昂價格和國產品牌稀少的這一現狀，研製開發了一種plc人機界面? plc監控器。本文系統地介紹了整個系統的開發過程，包括硬體系統、軟體系統的設計及實現，重點介紹了plc通信協議，監控器的基本工作原理以及期望實現的功能，監控器電源電路、 sram存儲器掉電保護電路、 cpu監控器電路、按鍵輸入電路的設計及按鍵狀態的讀入，時鐘信息的設定與讀取， cpu液晶顯示器指令系統，信息畫面及標簽數據結構的定義及顯示方法， cpu內部資源的分配，監控器與plc通信的軟體實現，文件格式的定義以及畫面數據的下載等。 plc監控器彌補了plc一些方面的不足，可以擴大plc的應用范圍，提升機械設備的檔次，增加設備的附加價值，具有一定的市場前景。
  14. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  15. We select fpga of type xc3s200 as hardware to design the coder and display the hardware resources inside, moreover study the method and steps of designing dsp, based on fpga, by using system generator, finally, it emphasizes the design process of multi - band excitation vocoder. we can work out the module of high pass filter and the module of low pass filter, module of divide frame, module of keynote rough estimate, module of keynote fine estimate, module of band - separated v / u judgment / verdict and module of band - separated amplitude estimate, by using simulink, ise and system generator

    本文選用型號為xc3s200的fpga作為設計編碼器的核心硬體，介紹了其內部所含的硬體資源，並研究了利用systemgenerator基於fpga設計dsp的方法和步驟，最後，本文把重點放在多帶激勵語音編碼器的設計上，利用simulink ， ise和systemgenerator分別設計其中的高通低通濾波器模塊、分幀疊加模塊、基音粗估模塊、基音精細估計模塊、分帶v / u判決模塊、分帶幅度估計模塊。
  16. - the focal point of this paper is studying the problem of cargoes ? weight measurement, besides the component of mechanical system, the component and control of electric - control system, the full - digital dc speed adjustment system and the hardware and software design of plc control system. this paper puts forward the project of current static measurement method and corrects it with acceleration dynamic measurement

    本文除分析介紹了集裝箱橋吊的機械繫統組成、電控系統的組成及控制、全數字直流調速器以及plc控制系統的軟硬體設計外，重點研究了集裝箱裝卸橋中的貨物稱重問題，提出了應用電流靜態測量法的稱重方案，並且採用了加速度動態測量法對其進行動態校正，在實際應用中取得了令人滿意的效果。
  17. In the hardware implementation of a multi - channel active noise control system, the computational complexity is increased sharply when the number of filter coefficients and channels are increased

    摘要在多通道有源噪聲控制系統的硬體實現中，當通道數目增大或濾波器長度較長時，常規的多通道演算法運算量急劇增加，使控制器可能無法實時實現。
  18. A vlsi very large scale integration architecture is also proposed to implement the improved motion estimation algorithm. experimental results show that this algorithm - hardware co - design gives better tradeoff of gate - count and throughput than the existing ones and is a proper solution for the variable block size motion estimation in avs

    考慮到avs主要面向圖像尺寸較大的高清數字電視壓縮，這種高復雜度的運算已經超過了現有通用處理器的運算能力，因此有必要設計專門的快速演算法和與這種演算法相匹配的硬體加速器。
  19. The micro - kernel architecture is suitable for dual - core environment, because the micro - kernel architecture has a good module and its size is small. based on the analysis the source code and the dual - core hardware architecture, modify the module in order to suit for the dual instruction stream environment of the dual - core processor

    在對代碼分析的基礎上，總結出代碼中所體現出現的內核各模塊的內部結構，再結合雙核處理器的硬體特點，對模塊進行修改，相當于對模塊作加法運算，使其滿足雙核處理器的雙指令流體系結構。
  20. Because of the reuse of some building blocks, such as adders and registers in fft processor, and the regularity of the circuit structure, the test scheme can be implemented at ? speed and in parallel without circuit performance degradation, and with minimal additional hardware and area overhead

    由於處理器中一些加法器、寄存器的再利用，以及電路結構的規則性，因而只需最少的額外硬體、面積開銷即可真速、并行地實施該測試方案而不會降低電路性能。
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