算術邏輯部件 的英文怎麼說

中文拼音 [suànshùluójiàn]
算術邏輯部件 英文
alu,arithmetic logical unit
  • : Ⅰ動詞1 (計算數目) calculate; reckon; compute; figure 2 (計算進去) include; count 3 (謀劃;計...
  • : 術名詞1. (技藝; 技術; 學術) art; skill; technique 2. (方法; 策略) method; tactics 3. (姓氏) a surname
  • : Ⅰ動1. (巡察) patrol 2. [書面語] (遮攔) blockⅡ名詞1. (巡察) patrol 2. [書面語] (山溪的邊緣) edge
  • : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
  • : Ⅰ名詞1 (部分; 部位) part; section; division; region 2 (部門; 機關或組織單位的名稱) unit; mini...
  • : Ⅰ量詞(用於個體事物) piece; article; item Ⅱ名詞1. (指可以一一計算的事物) 2. (文件) letter; correspondence; paper; document
  • 算術 : arithmetic figure; arithmetic
  • 邏輯 : logic
  • 部件 : component; unit; parts; assembly; subsystem; secundina (pl. secundinae)
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星載并行計機體系結構及軟體結構的特點,從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計機體系結構的系統級容錯模型研究,提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技研究,提出了任務級容錯調度演法以及基於檢查點技的系統級容錯恢復機制和策略,同時研究了利用系統重注入進行軟體在線自修復的容錯技;最後研究了基於fpga的級容錯技,提出了對容錯模塊這一星載并行計機關鍵的兩級容錯方案,實現該方案所需增加的電路少,可避免板級晶元以及fpga晶元內任何發生單點故障。
  2. Abbreviation of arithmetic logic unit, the part of a computer that performs all arithmetic computations, such as addition and multiplication, and all comparison operations

    算術邏輯部件的縮寫,執行全,例如加法和乘和全比較運的一臺計機的零
  3. Alu arithmetic logical unit

    算術邏輯部件
  4. Arithmetic logical unti

    算術邏輯部件
  5. This thesis emphasizes on full custom design methodology of high performance alu

    本文研究了高性能算術邏輯部件的全定製設計方法。
  6. A system consisting of two or more processing units, alus, or processors that can communicate without manual intervention

    由兩個或多個處理算術邏輯部件或不用人工干預就可以相互通信的處理機所組成的一種系統。
  7. A processor is composed of two functional units ? a control unit and an arithmetic / logic unit ? and a set of special workspaces called registers

    處理器由兩個功能(控制算術邏輯部件)與一組稱為寄存器的特殊工作空間組成。
  8. The alu designed with the methodology of full custom can realize higher speed, lower power dissipation and smaller area, and it has great value in application and significant meaning in practice

    採用全定製方法設計的算術邏輯部件速度快、功耗低、面積小,具有廣泛的應用價值和重要的實踐意義。
  9. Alu is one of the most important and usually used computing units in microprocessors, the speed and power dissipation of alu have important effect on the performance of whole microprocessor

    算術邏輯部件作為微處理器中最重要和最常用的運之一,它的速度與功耗對整個微處理器性能具有很大的影響。
  10. The proposed 64 bits high performance alu is optimized at algorithm level, logic level, circuit level and layout level, and is implemented in 0. 18 m cmos process. furthermore, the testing technique of the alu is discussed. this thesis mainly contributes to the following aspect : 1

    文章從的演法、結構、電路參數、物理版圖等多個層次進行設計優化,在0 . 18 mcmos工藝下實現了一款64位高性能算術邏輯部件,並對該的測試方法進行研究。
  11. Using “ logical effort ” method to analyze the circuit ’ s critical path, and choose the optimized size of transistors in theory by this method. then, using sta technique simulates and analyzes the circuit to optimize transistors size further, and the circuit optimization arithmetic based on sta is gained. results proved that the optimization strategy of combining theory and practice have better effect

    結果證明,這種理論與實際結合的優化策略具有較好的效果;三、典型條下,所實現版圖關鍵路徑延時1 . 38ns ,平均功耗45 . 3mw ,版圖面積0 . 05112mm2 ,達到了較小的延時、功耗和面積;四、針對所設計的算術邏輯部件,研究了一種獨特的內建自測試方法,只需較少的測試向量就可實現該100 %的故障覆蓋率,具有很高的效率和較低的代價。
  12. With the rapid development of semiconductor, digital integrated circuit ( p, memory, standard logic gates, etc. ) and advance computer technology, the various measuring instruments ( virtual instruments ) with the powerful function of pc are produced in different industrial and scientific research fields. as we all known, the traditional instruments are usually built with discrete components and small scale ics, the disadvantages are obvious in system design, debugging and maintenance

    隨著半導體技與數字集成電路(微處理器、存貯器以及標準門電路等)技的迅速發展,特別是隨著計機技的發展,在工業生產和科學技研究的各行各業中,人們利用pc機的強大處理功能代替傳統儀器的某些,開發出各種測量儀器(虛擬儀器) ,傳統儀器的數字分多是採用分立集成電路( ic )組成,分立ic愈多,給系統的電路設計、調試及維護帶來諸多不便。
  13. In the constructing of the diagnosis module using the technology of the combination of the fuzzy logic and neural network, which based on the fuzzy adaptive learning control network, a simple kind of capable method for consummate the structure and performance of network is introduced, which includes the rules extraction based on the maximum weights matrix and the parameters amendment based on genetic algorithm by floating - point coding. during the monitoring of the parts condition, the output of the condition monitoring system shows the good working condition of the executing agency by fuzzily deducing from the control instruction send by the auv ' s controller and motion status, and so offers the proof to complete mission and return safely

    在珍斷模塊建模中採用模糊與神經網路結合的技,以模糊自適應學習控制網路為核心,提出了一種簡單可行的基於最大權值矩陣的規則提取及基於浮點數編碼的遺傳演法的參數調整的,完善網路結構與性能的方法,並在狀態監測過程中,通過對由控制器輸入的水下機器人運動控制量以及運行狀態的模糊推理,得到執行(推進器或舵)的工作狀態優劣程度,為保證水下機器人完成任務,安全返回提供控制依據。
  14. Additionally, we exactly designed the central process department : arithmetic logic unit

    另外,精心設計了微控制器的核心單元。
  15. Based on the theory model of quantum computing and the quantum computing technique in existence, we have proposed the cooperating architecture of quantum computer. in this architecture, it uses the classic processor as its control unit, and use the quantum arithmetic logical unit and quantum memory unit as its co - process unit

    針對這種情況,通過對量子計的深入研究,全面剖析現有量子計系統,借鑒經典計機中的研究成果,作者提出了協同量子計機體系結構方案,在該方案中,使用經典計機完成量子程序中的常規數據處理和程序控制,而將量子計做為協處理器,只負責完成量子計
  16. There is a small set of basic logic components that can be combined in various ways to store binary data and to perform arithmetic and logical operations on that data

    這里有一系列基本,可以各種方式組合起來儲存二進制數據和對這些數據進行操作。
  17. Information technology - computer graphics and image processing - image processing and interchange - functional specification - part 3 : image interchange facility : amendment 1 : type definition, scoping and logical views for image interchange facility

    信息技.計機圖形和圖像處理.圖像處理和交換.功能規范.第3分:圖像交換設備:修改1 :圖像交換設施.修改1 :圖像交換設施的類型定義范圍和視圖
  18. And the use - case diagram, state diagram and class diagram are used in uml diagram, which describe the software model from its function, logic and static structure. and the main arithmetic is shown. during the detail design process the com component technology is applied to envelop the logical part, hence to update and improve the software ; the software system of evaluation of the virtual prototype of the high power tf co2 laser is developed

    本文採用面向對象的軟體工程方法對高功率橫流co _ 2激光器虛擬樣機評價軟體的需求進行了分析,並用uml中的用例圖、狀態圖和類圖分別從功能、和靜態結構三個方面對軟體模型進行了描述,提出了主要演法,在詳細設計過程中應用com組對其中分進行封裝,以便於升級和改進,開發了高功率橫流co _ 2激光器的虛擬樣機評價的軟體系統。
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