計時碼 的英文怎麼說

中文拼音 [jìshímǎ]
計時碼 英文
timing code
  • 計 : Ⅰ動詞1 （計算） count; compute; calculate; number 2 （設想; 打算） plan; plot Ⅱ名詞1 （測量或計算...
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 碼 : Ⅰ名詞（表示數目的符號或用具） a sign or object indicating number; code Ⅱ量詞1 （指一件事或一類的...
  • 計時 : reckon by time; timing; chronography
  1. Therefore, during system design, cascade coding combining reed - solomon codes and convolutional codes is utilized ; in addition, time - direction and frequency - direction interleaves are added to alleviate channel fading

    因此在進行系統設計時，採用了rs碼與卷積碼的級聯編碼方案，並同時加入時間交織和頻率交織來對抗通道衰落。
  2. Where the first timing pass measures code that has been aggressively inlined with monomorphic call transformation, and the second pass measures code that has been subsequently deoptimized due to the jvm loading another class that extends the same base class or interface. when the timing test method is called with an instance of

    中所討論的內聯（ inlining ）和反優化（ deoptimization ）問題的犧牲品，在這些篇文章中，第一個計時度量的是那些已經與單一調用轉換（ monomorphic call transformation ）內聯的代碼，而第二個計時所度量的代碼，由於jvm要裝載另一個擴展相同基類或介面的類，因而經過了反優化。
  3. For applying this system to different kind of bulk terminal, such as coal and ore bulk terminal, it makes this system propagable and extensible. and it also reseach the special arts of grain bulk terminal, such as exchange stockpile and direct get

    為了使此模擬系統不受限於特定的碼頭工藝，而且考慮到散糧、礦石、煤炭等散料碼頭工藝的相似性，在設計時充分考慮了此模擬系統對不同的碼頭工藝路線的通用性及在碼頭工藝路線發生改變時的可擴展性。
  4. If you add a host control to a document at design time, you should not remove it programmatically at run time because the next time you try to use the control in code, an exception is thrown

    如果在設計時向文檔添加宿主控制項，則不應在運行時以編程方式移除該控制項，因為下次嘗試在代碼中使用此控制項時會引發異常。宿主控制項的
  5. Space - time codes can be divided into tree mainly parts : bell layered space - time architecture ( blast ), space - time trellis codes ( sttc ) and space - time block codes ( stbc ). in this paper, we mainly compare the performance of blast and stbc in many aspects, such as design criterion, transmission rate, diversity gain, diversity combining, bit error rate and channel capacity etc. in this paper, we first respectively analysed the instantaneous received symbol energy - to - noise ratio of v _ blast in the diversity combining methods of maximal ratio combining ( mrc ), equal gain combing ( egc ) and selective combing ( sc )

    Mimo技術核心是空時編碼（ stc ） 。空時編碼主要分為三種:分層空時碼（ blast ） 、空時格碼（ sttc ）和空時塊碼（ stbc ） 。本文主要對分層空時碼和空時塊碼這兩種編碼方式在設計準則、傳輸速率、分集增益、接收合併、比特差錯率和通道容量等方面進行了較為詳盡的研究。
  6. Comparing the design of a coal terminal adopting different models of transport vessels in the pearl river delta region, this paper demonstrates the feasibility of adopting self - unloading vessels in newly - built and rebuilt terminals, to serve as a reference for similar terminal design

    摘要通過對珠江三角洲河網地區某電廠煤碼頭採用不同運輸船型的比較設計，提出該區域電廠新建和改建碼頭採用自卸船碼頭的可行性與經濟性，供同類碼頭設計時參考、借鑒。
  7. When more than 10 6 ( 3, 2 ) parity check codes are used to estimate the snr of awgn channel and rayleigh fading channel, the estimation error is less than 1 %

    在bpsk信號通過awgn通道和單徑瑞利通道下使用（ 3 ， 2 ）碼估計，當統計的碼字數達到106以上時，估計誤差不會超過1 % 。
  8. With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit

    在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。
  9. At last, the paper solves the depreciation problems of the vessel that is sealed up for keeping and port and dock, bringing forward that the parts that are still worn down during the sealed period should be depreciated and the parts having no or less spoilage should not be depreciated according to the theory of parts measurement. the port and dock, able to be wholly renewed through locally overhauling in turn, should apply the method of replacement accounting to process accountancy. xin dawang ( finance and accounting ) directed by professor : shao ruiqing

    上海海運學院jn ：學位論義最後論述了封存船舶和港口碼頭的折舊問題，本文提出：在部件計價基礎上，船舶封存應只對封存時仍繼續損耗的部件計提折舊，其餘未使用或者損耗很小的部件則不計提折舊：港口碼頭可以通過局部輪番大修實現整體更新，每個泊位根據大修制度定期進行大修，等到所有泊位都經過大修以後，則整個碼頭都同新建的碼頭泊位發揮的效用相同，進而應運用重置會計對碼頭固定資產進行會計核算，以正確處理港口碼頭的修理支出以及折舊計提問題。
  10. The functional model and information model are built with idef base on the basic model for bom management. this dissertation thoroughly analyzes the key modules of bom management. the solution for computer coding is brought forth, and the dynamic model of process management is put forward, and the solution for static privilege management and dynamic privilege management is brought forward

    然後以bom管理原理模型為基礎，利用idef的方法建立了bom管理的功能模型和信息模型，並對bom管理相關關鍵單元模塊進行了詳細分析，提出了計算機編碼的解決方案，給出了bom配置設計時使用的動態流程管理模型，並給出了bom管理的動態權限管理和靜態權限管理的實現方案。
  11. ( 3 ) the features of the low frequency time - code receiver are digital, high performance and high precision. on the basis of the testing flat of low frequency time - code, we designed a low frequency time - code receiver based on software radio

    在前面已經實現的低頻時碼信號測試平臺的基礎上，對設計一種基於軟體無線電模式的低頻時碼接收終端作了初步的探討，為今後的全數字化接收機的實現打下一定的基礎。
  12. When you are creating a tableless design, you should be using standards compliant code

    當你進行無表設計時，你必須使用一套合適的、標準的代碼。
  13. The major contributions of the dissertation are as follows : 1. it is well known that the multi - value cdma spreading codes can be designed by means of a pair of mirror multi - rate filter - banks based on some optimizing criteria. the dissertation indicates that there exists a theoretical bound in the performance of its circular correlation property, which can be described by an explicit expression. based on this analysis, a criterion of maximizing entropy is proposed to design such codes

    研究了基於兩帶鏡像多速率濾波器組來設計的多值cdma擴展碼的方法，並推導出了基於這種方法設計的碼序列在循環相關特性方面所能達到的極限，以及達到此理論極限時應滿足的條件；在此基礎上，提出了一種基於熵最大化準則來產生cdma擴展碼的設計方法。
  14. Using an 8 - depth async fifo solves the synchronization and exchange of data be - tween different clock domains. the data transaction protocol comes from the most basic work way of uart. when the master clock is 16. 7mhz, the pcm side and adpcm side clocks both are 2. 38mhz, the results of simulation show that the latency from the start - bit of pcm data inputting uart receiver to the stop - bit of adpcm data outputted uart transmitter is 14. 3 us and the latency from the start - bit of adpcm data inputting uart receiver to the stop - bit of pcm data outputted uart transmitter is 14. 7 us

    在主時鐘為16 . 7mhz ， pcm數據端與adpcm數據端時鐘均為2 . 38mhz時，模擬結果表明從pcm的起始位輸入uart接收器到adpcm終止位輸出uart發送器的最大延遲為14 . 3 s ，從adpcm的起始位輸入uart的接收器到pcm終止位輸出uart發送器的最大延遲為14 . 7 s ，設計時盡可能的使編碼與解碼的時間相差不多，從結果看出基本達到這個要求。
  15. Finally, the concept of space - time codes and encoding design criteria are discussed here. chapter 4 describles space - time block codes thoroughly

    最後闡述了空時碼概念，並詳細給出了空時碼編碼設計思想和準則。
  16. Several mechanisms are provided to assure the system security based on the ultrakernel. separation, multilevel, hardware based access control and code error tolerance mechanisms are well integrated. ( 3 ) a developing platform and a firewall system prototype

    整體採用可生存設計;在系統設計時加入了抗緩沖區溢出攻擊機制和對抗dos攻擊機制;設計了一種容忍代碼錯誤的機制，另外還採用隔離與分級機制，並對blp模型進行改進應用。
  17. In chapter 4, the main concept and the key technology of software radio are discussed. also the important digital theory such as fft and digital filter are introduced in the last part

    第（ 3 ）和第（ 4 ）部分的內容是為了今後順利開展低頻時碼的數字化研究，而提出的有關軟體無線電接收的一種設計方案，有待於今后的進一步開發研究。
  18. Notice how similar the code is to the egg timer application

    注意這段代碼與煮蛋計時器應用程序非常相似。
  19. The code in listing 1 forms the basis for a simple egg timer written in the java language

    清單1中的代碼構成了一個簡單的煮蛋計時器的基本結構，它用java語言編寫：
  20. This will also serve as the model for what i want to do using javassist

    因為有這個方法的源代碼，所以我將為您展示如何直接添加計時信息。
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