譯碼器的應用 的英文怎麼說

中文拼音 [yìmǎqìdeyīngyòng]
譯碼器的應用 英文
applications of decoder
  • 譯 : 動詞（翻譯） translate; interpret
  • 碼 : Ⅰ名詞（表示數目的符號或用具） a sign or object indicating number; code Ⅱ量詞1 （指一件事或一類的...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 的 : 4次方是 The fourth power of 2 is direction
  • 應 : 應動詞1 （回答） answer; respond to; echo 2 （滿足要求） comply with; grant 3 （順應; 適應） suit...
  • 用 : Ⅰ動詞1 （使用） use; employ; apply 2 （多用於否定: 需要） need 3 （敬辭: 吃; 喝） eat; drink Ⅱ名...
  1. Turbo codes represent the new code structures, which consist of pccc ( parallel serially convolutional code ) and sccc ( serially concatenated convolutional code ). in this paper, the background of turbo codes are firstly introduced, which includes the base principle of error correction code 、 block code and convolutional code ; the principle of turbo code and the iterative decoding is secondly expanded ; the key decoding algorithm : a revised map algorithm and iterative decoding theory are detailed ; then, a new turbo code structure : hccc ( hybrid concatenated convolutional code ) is presented, and the capacity of this code method is analyzed, the average capacity upper bound is derived ; at last, this code is simulated on awgn ( additive white gaussian noise ) channel and rayleigh fading channel

    本文首先介紹了turbo碼的背景知識，包括差錯控制的基本原理、分組碼和卷積碼；然後闡述了turbo碼的基本原理，包括turbo編譯碼器結構及迭代譯碼原理；較為詳細地描述了關鍵的譯碼演算法： ?種改進的最大后驗概率（ map ）譯碼演算法及迭代譯碼演算法；提出了一種新的turbo碼結構：混合turbo碼（混合級聯卷積碼） ；並用編碼性能聯合界分析方法對混合turbo碼進行了性能分析，得出了其平均性能上界；並在高斯白噪聲通道和瑞利衰落通道上分別作了一些應用研究及計算機模擬實驗。
  2. Abstract : the paper presents the method with the encoder and decoder instructions, with the switch of bcd in possession of six input points to realize the externally setting up in the device parameter in plc of multibit data

    文摘:本文提出應用數據編碼指令和數據譯碼指令，用一位bcd碼開關，佔用六個輸入點，實現多位數的plc器件參數的外部設定方法。
  3. Based on comprehensively considering the specific features of monitoring configuration software ' s applying, a configuration language - c2000 language is designed, whose compiler and development environment are then fulfilled. the designing, syntax analysis, semantic analysis and intermediate code generating of c2000 are deeply discussed. a virtual machine is also presented and implemented to support the executing of the intermediate code

    論文對組態軟體中的用戶編程介面進行了研究，在充分考慮了監控組態軟體的行業應用特點的基礎上，設計了一種組態語言? ? c2000語言，對其編譯器及開發環境的實現方案進行了詳細論述；並對語言設計、語法分析、語義分析，以及中間代碼生成和用來對中間代碼解釋執行的虛擬機等進行了深入的討論，詳細論述了各語法成分的實現，總結了對源程序中錯誤處理的方法。
  4. We put the emphases on the soft output viterbi algorithm ( sova ), which is one of turbo code ’ s decoding algorithms, and presents the derivation and computation step of the sova decoding algorithm. after presenting sova and map decoding algorithms and analyzing four kinds of decoding algorithms, the paper makes a comparison among the different decoding algorithms by emulation analysis, and analyzes the time complexity of various algorithms, and then contrasts them. in the last part of this paper, according to the criterion recommended by the consultative committee for space data systems ( ccsds ), including code rate,

    根據空間數據系統顧問委員會（ ccsds ）為turbo碼應用於深空通信系統推薦的標準，包括碼率、碼塊大小、分量碼類型、約束長度、碼生成多項式，以及交織器的選擇等參數的建議以及sova譯碼演算法的理論基礎，設計了sova演算法的實現結構，通過模擬驗證了本文所採用的turbo碼的性能，從而證明turbo碼確實是一種很好的通道糾錯編碼方式，它適用於要求功耗低或信噪比低的深空通信系統中。
  5. The design and application of ad6640 and ad6624 are fully discussed in this part. the design of software module includes the parameter design for ddc filter and the baseband signal processing of dsp. and the realization of the viterbi channel decoding algorithm by dsp and the simulation of the burst at the transmitter are discussed

    模塊的硬體設計主要包括： a d轉換器、數字下變頻器（ ddc ）以及dsp ，詳盡討論了a d器件ad6640和ddc器件ad6624的設計和應用；模塊的軟體設計主要包括： ddc濾波器參數設計和dsp的基帶信號處理，給出了viterbi通道譯碼演算法dsp實現和發射端突發形成的模擬實現。
  6. A brain decoder that worked on all brains still might not allow for telepathy on the order of a vulcan mind meld in the star trek series, which enabled universal translation

    一個可用在所有大腦的大腦解碼器，還是無法做到科幻影集星艦奇航中瓦肯人心靈融合那樣的精神感應，可以轉譯所有語言。
  7. It probed into the key technology of realizing the integrated development environment, including the methods to implement a code editor which support many features as automatic syntax highlighting, code autocompletion etc. ; the scheme and technology to compile and link the source code on the heterogeneous cluster system ; the analysis and use of the api of pbs, a widely used job management system ; the scheme and technology to distribute and manage the parallel jobs on the heterogeneous cluster system ; the methods to implement the monitor and control system of cluster nodes. and then the parallel programming integrated development & management environment ( ppidme ) was implemented base on the above analyses. finally, an example is presented which use ppidme in parallel programming

    本文在對異構機群并行計算環境研究的基礎上，提出了對于程序員友好、方便和實用的集成開發環境應該具備的要素，著重探討了實現集成開發環境的關鍵技術，其中包括支持語法高亮等功能的源代碼編輯器的實現方法、異構機群環境下源程序編譯連接及并行作業分發管理的實現方案與技術、 openpbs作業管理系統的應用編程介面的分析與使用、機群節點的管理與監控實現方法等，並基於上述關鍵技術設計與實現了異構機群系統集成開發管理環境軟體ppidme ，最後給出了使用ppidme進行并行程序開發的一個應用實例。
  8. This declspec is a promise to the compiler, and if the function references globals or second - level indirections of pointer arguments then the compiler may generate code that breaks the application

    此declspec是對編譯器的一個承諾，如果該函數引用全局變量或第二層間接指針參數，則編譯器會生成將中斷應用程序的代碼。
  9. When the resulting executable is run, tags are sent to a data collection agent that then sends the data to the host application. using this technology, codetest provides performance, coverage, and memory analysis, and a software execution trace capability similar to a logic analyzer

    在構建處理過程中，在不影響原始源代碼的前提下，使用編譯器將插樁標記插入代碼。運行結果執行時，標記被發送至數據收集代理，然後數據被發送至主機應用。採用此技術，
  10. An application of logic devices able to program to the decoding circuit

    可編程邏輯器件在譯碼電路中的應用
  11. In detail, they are bit - interleaved coded modulation ( with iterative decoding ), low - density parity - check codes and stf technology. by the performance analysis of bicm ( - id ), which can make code and modulation optimal separately, and achieve maximum possible coding diversity as well as modulation gain, guidelines for its design and an easy algorithm for siso are proposed. design of capacity - approaching of ldpc codes and efficient encoding of them as well as several kinds of its decoding algorithms are investigated

    具體的講，就是討論了基於比特交織的編碼調制技術，並給出了映射方式的設計準則以及核心模塊siso的一種簡單的f - map演算法；研究了編碼最小漢明距隨碼長線性增加的ldpc碼的幾個方面的問題，包括接近香農限碼子集的度分佈對的設計、有效編碼器的實現和各種譯碼演算法的優缺點，並對基於ldpc碼的bicm應用於ofdm傳輸系統中的性能進行了模擬。
  12. As a result, c2000 compiler can generate a compactly structured intermediate code effectively, which can be executed by c2000 virtual machine efficiently, safely, and stably. thus the problem put forwarded at the beginning of this paper is solved, and the requirement of monitoring configuration software in the support of programming interface is satisfied well

    實際應用表明， c2000編譯器能夠生成結構緊湊的中間代碼，其虛擬機對中間代碼解釋執行時，效率高，運行穩定、可靠、安全，解決了一般組態軟體中在對用戶編程介面支持方面的問題，很好地滿足了監控組態軟體的需求。
  13. For practical implementations, simpler decoding algorithms have been suggested. this decoder implements iterative decoding of tpcs using a soft - input hard - output decoder, followed by reliability calculations to obtain oft - decisions from the hard - output of the decoder. the performance of this decoder is nearly optimal and thus the decoding strategy presents a good compromise

    針對實際應用中存在的計算復雜問題，在重復譯碼實現中採用軟進/硬出的簡化演算法，用可靠度估計從硬判決輸出中獲得軟信息，從而使譯碼器在性能優越和計算簡便之間獲得了一個很好的折中，並通過硬體實現了tpc的實時解碼，在低信噪比（ eb / n0 ）的條件下取得了非常低的誤碼率。
  14. Furthermore, this chapter analyzes the method and critical technique of the hardware / software co - design in general system and some concrete applications in this chip

    最後以rs譯碼器的實現為例來具體說明基於asip的軟硬體協同設計的主要過程，也對asip的構造和應用進行了分析。
  15. The performance of decoding algorithm has a direct impact on the quality and efficiency of translation. in this paper, studies are focused on the decoding algorithms of phrase and syntax - based statistical machine translation, respectively. according to the features of these models, efficient scoring strategies and heuristic functions are adopted and beam search algorithm is applied

    本文主要對統計機器翻譯中基於短語和基於句法的翻譯模型的解碼問題進行了研究，分別根據翻譯模型的特點採取有效的評分策略，選擇合理的啟發式信息，應用柱搜索策略，在不顯著降低譯文質量的同時提高解碼效率。
  16. Firstly, this paper discusses several algebraic algorithms for encoding and decoding reed - solomon codes from the view of engineering. then their applications in atm and dvb systems are investigated particularly. finally, fpga implementation of reed - solomon codes is discussed

    本文主要是從工程應用的角度，討論了rs碼的幾種編譯碼演算法，並且著重論述了rs碼的兩個應用和如何用fpga設計編譯碼器。
  17. The paper expounds on the theory, concept and application of reed - solomon code by the brief introduction of error controlling system and channel coding, and finally finishes the design of rs code coder and decoder under the guidance of dvb - c standards by consulting the related references

    本論文通過對差錯控制系統及通道編碼的簡單介紹，進而闡述了reed ? solomon碼的原理、概念和應用，參考有關文獻，完成了在dvb - c標準下對rs碼編譯碼器的演算法的程序編制和硬體的結構設計。
  18. This paper achieves expected digital filters program through algorithms descriptions, analyzing and realization, simulation, comparing on error and speed. this paper achieves expected digital interpolations program through algorithms descriptions, analyzing and realization, simulation, comparing on error and speed

    本文應用matlab信號處理工具箱，通過對數字濾波器演算法的描述、演算法分析、實驗模擬、誤差比較，及性能比較，最終獲得滿足要求的數字濾波程序，並編譯成c + +源代碼文件配合主程序調用，完成了系統聯調。
  19. First this article introducs java " s characteristics and real - time java platforms and detailedly analyze the java " s disadvantageous factor applying in real - time environment and which aspects need to be improved if real - time java wants to be realized. the aspects demanded extension involve virtual machine, byte code analyzer, byte code interpreter, the real - time run and the contents of the real - time task etc. through the research of the rtsj ( real - time java specification ) and its apis, the article discusses each aspect which bases on the traditional java

    本文首先介紹了java編程語言特點及實時java平臺，詳細分析了java應用在實時環境中的不利因素以及要實現實時java需要對哪些方面進行改進。這些需要改進的方面既有java本身的虛擬機、位元組碼分析器、位元組碼翻譯等內容，又有實時執行、實時任務方面的內容。通過對rtsj （實時java規范）及其apis的研究分析，對它在傳統的java基礎上擴展的各個方面進行了討論。
  20. In the third chapter, the principles of randomizer and de - randomizer are illuminated, and the hardware realization is also given. the fourth chapter is focused on the design of ip ( intellectual property ) and the analysis of the principle of rs encoding and decoding. based on the theory of design reuse in soc ( system on chip ), this chapter is devoted to the design and implementation of rs decoder ip which can be implied in three hdtv channel decoder standard

    第四章首先介紹了ip的基本知識和設計流程，接著對rs碼的編碼和譯碼進行詳細的理論分析研究，提出rs編譯碼器實現方法，然後根據soc可復用設計設計思想，設計了一個應用於hdtv通道解碼的rs譯碼ip核，最後給出dvb - crs譯碼器的asic設計，並給出了其規模和性能。
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