譯碼環 的英文怎麼說

中文拼音 [yìmǎhuán]
譯碼環 英文
decoding band
  • 譯 : 動詞（翻譯） translate; interpret
  • 碼 : Ⅰ名詞（表示數目的符號或用具） a sign or object indicating number; code Ⅱ量詞1 （指一件事或一類的...
  • 環 : Ⅰ名詞1 （環子） ring; hoop 2 （環節） link 3 （姓氏） a surname Ⅱ動詞（圍繞） surround; encircle;...
  1. Chapter 3 discusses the modules used in the fh - mpsk and fh - / 4dqpsk systems. these modules include : duc / ddc ( digital up converter / digital down converter ), nyquist flitter, burst start detection, interpolation module, pll ( phase locked loop ), pll error extraction, initial phase correction and the coding and decoding for tcm

    第三章主要討論了跳頻模式下fh - mpsk和fh - 4dqpsk系統中各個模塊的設計，這些模塊包括：上下變頻器、奈奎斯特濾波器、信號到達檢測、插值模塊、通用環路、各環路誤差提取方法、初始相位校正和tcm編譯碼。
  2. Based on comprehensively considering the specific features of monitoring configuration software ' s applying, a configuration language - c2000 language is designed, whose compiler and development environment are then fulfilled. the designing, syntax analysis, semantic analysis and intermediate code generating of c2000 are deeply discussed. a virtual machine is also presented and implemented to support the executing of the intermediate code

    論文對組態軟體中的用戶編程介面進行了研究，在充分考慮了監控組態軟體的行業應用特點的基礎上，設計了一種組態語言? ? c2000語言，對其編譯器及開發環境的實現方案進行了詳細論述；並對語言設計、語法分析、語義分析，以及中間代碼生成和用來對中間代碼解釋執行的虛擬機等進行了深入的討論，詳細論述了各語法成分的實現，總結了對源程序中錯誤處理的方法。
  3. The decoder is compiled and simulated in ep1c12q240c by quartusii - 5. 0. the different error style is added to the sequence received in emulated channel. correspondingly, the correct decoding results are attained at the output terminal

    在quartusii - 5 . 0模擬環境下以cyclone系列的ep1c12q240c為目標晶元對譯碼器進行了編譯和模擬，在接收序列中加入不同的錯誤類型，相應的在譯碼器輸出端得出了譯碼后的正確譯碼結果，驗證了設計方案的正確性。
  4. It is not many scholars to clearly prove the opinion of shifting the burden of proof, on the contrary the contradictory scholars are more prominent, for example the vice professor of southwest politics and law university, chengang, wuyue who translates and introduces the burden of proof of germany, because them there are more and more people support the opposite opinion, while in the draft of " civil evidence code ", the traditional idea win, in this draft the legislator abides by the present justice and our country ' s native circumstance, they made an scientific choice, of course, the burden of proof will directly influence the party " s possibility of losing the lawsuit, while the regulation of shifting the burden of proof increases the plaintiff ' s opportunity to win a lawsuit. to explain what is the shifting of burden of proof, the paper use the civil law as the example to point out the " reverse " is not entirly relieve the plaintiff s obligation of producing evidence, but in certain extent and in certain range make the defendant bear the burden of producing those proofs from the reverse way, which are originally beard by the plaintiff. in the three proceeding law, shifting the burden of proof have some differences, but the interior spirits are coincident - for the values of social justice and the legal reason

    論證舉證責任倒置的學者觀點明確並且論證十分充分的不多，相反卻是對此著書立說予以反駁的學者較為突出，如西南政法大學的副教授陳則博士，翻譯並介紹德國證明責任學說的吳越先生均是目前國內對舉證責任倒置持否定態度的代表人物，由於他們的推動使得國內持此說的人越來越多，但在《民事證據法（草案） 》的擬定過程中，並未采責任倒置的地位，這樣的立法選擇是建立在對我國法律實現的本土環境客觀認識的基礎上的科學選擇，誠然，舉證責任的分配直接影響到當事人在訴訟中的敗訴風險，而「倒置」規則的設計，則在此問題上增加了原告勝訴的籌碼，在理解何為舉證責任倒置時，本文著重以民事法為主線，指出這種「倒置」並非全部免除原告的證明責任，而是在一定范圍與一定程度上將通常應由原告負擔的舉證責任轉由被告從反方面承擔，舉證責任倒置在三大訴訟法中所體現的具體情形有所差異，但它們的內在精神是一致的?法律的理性與社會公平價值，在民事訴訟中舉證責任倒置的情形，一般總是將其局限於特殊侵權情形，而忽略了民事合同違約責任的訴訟中的原告也無須對被告應承擔違約責任的所有要件，對被告主觀上的過錯實行推定，若被告予以否定則應對其無過錯的證據舉證，在設置舉證責任倒置的規則時，從各國的立法經驗與法的內在價值要求可以總結出以下幾個原則:程序法與實體法結合原則，公平原則，訴訟經濟原則，保護弱者原則等，基於此完善舉證責任倒置的規則時首先應肯定舉證責任倒置的概念，其次立法應避免求大求全，再次要配合實體法的發展，最後還可以在司法領域嘗試判例的指導意義。
  5. Loop is effectively dead code, and the compiler is designed to eliminate any dead code it can identify

    循環實際上是死代碼，編譯器會清除任何發現的死代碼。
  6. The cla ic compiler optimizatio, such as dead code elimination, co tant folding, co tant propagation, elimination of partial redundancies, loop unrolling, etc., are static analyses

    典型的編譯器最優化，如死代碼消除、常數合併、常數傳送、部分冗餘的消除、循環展開等等，是靜態分析。
  7. So the complexity of lfrr is low. a hardware implementation for lfrr is proposed. parallel comparator and encoder lead to a fast construction of schedule table

    本文還提出了一種用硬體電路構造調度表的方法，採用并行比較加譯碼，可以很快構造出循環調度表。
  8. The viterbi decoder with hard decision designed by the paper, is aimed at ( 3, 1, 9 ) convolutional coding. the data rate is 9. 6kbps. the data rate received by the rake receiver is spreaded by 127 - bit spread sequences, added pilot signals and modulated by qpsk

    該課題所設計viterbi譯碼是針對（ 3 ， 1 ， 9 ）卷積碼的硬判決譯碼，數據速率為9 . 6kbps ; rake接收機所接收的數據是擴頻因子為127 、加入導頻且經qpsk調制的擴頻信號，使用verilg硬體描述語言在xilinx公司的ise環境下在用現場可編程門陣列（ fpga ）來實現viterbi譯碼器和rake接=收機的功能。
  9. Based on tanner graph, the representation and construction of ldpc codes are addressed, and the two decoding algorithm for ldpc codes, i. e, bit - flipping algorithm and sum - product algorithm, are discussed. from two aspects - minimum distance and the failure of independence assumption, the impacts of cycles to the performance of ldpc codes are analyzed. 2

    基於tanner圖模型，詳細介紹了ldpc碼的表示和構造；介紹了ldpc碼的硬判決譯碼（比特翻轉演算法）和軟判決迭代譯碼（和積演算法） ；從最小距離和獨立性假設失效兩個方面分析了環的存在對ldpc碼譯碼性能的影響； 2
  10. The at 2 scale based on the internal area - time lower bound of the viterbi decoder is analyzed. and the at 2 scales of three vlsi realization algorithms ( m - step decoder algorithm, flow and block decoder algorithm, and sliding block decoder algorithm ) are deduced. in succession, a fully new algorithm named ring - vd algorithm designed by ourselves is put forward, and its at 2 scale is also fetched

    分析並推導了viterbi譯碼器基於內部信息流的vlsi面-時下界at2尺度;推導了已有的三種viterbi譯碼器的vlsi高速實現演算法（ m步譯碼演算法、流水式塊譯碼演算法和滑動塊譯碼演算法）的at2尺度;提出了一種新的環形vd演算法，並推導了它的at2尺度;對四種viterbi譯碼器的vlsi高速實現演算法進行了比較分析。
  11. Before the development of the system, the article describes the above - mentioned aspects, as the bases of the system development. the article emphasizes related auto - controlling technologies : open - 100p and close - 100p, and control mode of negative - feedback, the scatter and quantization of the simulate signal, the conception of a / d and d / a conversion and code / encode, the basic sampling principles of the simulate signal. the article introduces the operation method and process of the system by means of the load spectrum

    文章對相關的理論進行了陳述，以作為系統開發的理論依據，重點闡述了自動控制系統中包括開環閉環在內的幾大主要控制模式，以及有關的負反饋控制方式，模擬信號的離散與量化，模數轉換、數模轉換、編碼譯碼的概念，及模擬信號采樣的基本原理? ?采樣定理，並以載荷譜法為例，簡述了所研究的系統將要採取的工作方式及工作過程。
  12. The functions of system controller are mainly finished by dsp and cpld. the functions, such as the realization of closed - loop and calculation of the modulation duties online, are finished in dsp. the responsibility of cpld mainly is switch control signals transition

    其中，系統的控制器功能主要由dsp和cpld完成， dsp實現系統閉環並實時計算調制占空比等功能， cpld負責開關控制信號的譯碼轉換等工作。
  13. The principles of soft decoding and message passing are discussed. based on normal graph, the update formulas for message passing are derived and further the optimality of message passing algorithm for cycle - free graphs is proved. finally, the issues affecting message passing in graphs with cycles are analyzed

    介紹了軟判決譯碼和消息傳遞的基本思想；基於normal圖，推導了消息傳遞演算法的迭代公式，論述了無環圖上消息傳遞演算法的最優性，並分析了影響有環圖上消息傳遞的因素； 3
  14. Although long ldpc codes are superior to turbo codes, it is not the case for short ldpc codes. so the modification of decoding algorithm is essential to the performance improvements for ldpc short codes

    因此， ldpc的編譯碼方面還需要進一步研究，例如碼的構造及線性編碼問題，如何對和積演算法進行改進以適應有環圖上的譯碼從而在根本上提高ldpc碼的性能。
  15. Since 1980s, many mathematicians have been engaged in studying the applications of the grobner basis such as solving the system of algebraic equations, factoring polynomials, testing primary ideals, factoring algebraic manifolds, decoding circular codes in corrected codes and algebraically geometrical codes, analyzing and synthesizing high dimensional linear recurring arrays in cryptology, dealing with multidimensional systematic theory, signaling, solving integer programming and so on

    ） bner基的應用研究包括代數方程組求解，多項式的因子分解，素理想的檢驗，代數流形的分解，糾錯碼中循環碼和代數幾何碼的譯碼，密碼學中高維線性遞歸陣列的分析與綜合，多維系統理論，信號處理和求解整數規劃等諸多領域。
  16. The whole realization scheme of tpc decoding based on fpga, design flow and unit decoder are discussed in detail, of which sub - code is ( 64, 57 ) extended hamming code. the hardware description language and ide adopted are verilog hdl and quartusii - 5. 0

    文中以（ 64 ， 57 ）擴展漢明碼為子碼，詳細闡述了tpc碼譯碼fpga實現的整體設計方案、實現流程和單元譯碼器的具體實現方法，在quartusii - 5 . 0環境下用veriloghdl語言實現了整個設計。
  17. After the advantage and disadvantage of many kinds of decoding algorithm of rs codes was analyzed, the step - by - step decoding algorithm is used in this paper, according to the environment of coke plant

    本文在比較了目前各種rs碼譯碼的優缺點后，針對焦化廠工作環境的特點，採用了step - by - step譯碼演算法。
  18. According to the structure of quasi - cyclic ldpc code, we can make a trade - off between hardware complexity and decoding throughput by applying semi - parallel architecture

    摘要利用準循環ldpc碼的結構特點，使用半并行結構的譯碼器可以實現復雜度和譯碼速率的有效折中。
  19. In the gsm system, error - control is the key - technology of the wireless - interface. combining the error - control technology with the software and hardware, in the baseband transmit part of the gsm mobile station test set, i ' ll provide a module which can accomplish the physical layer ' s protocol of the wireless - interface., and the fec technologies, such as cyclic code, convolutional code and viterbi decode, can be achieved by the baseband module, too

    差錯控制技術是gsm移動通信系統無線介面協議的核心內容，本課題的任務是將差錯控制技術的原理與相關的軟、硬體結合起來，在gsm移動電話綜合測試儀的數字基帶模塊中實現gsm無線介面的物理層協議，完成差錯控制技術中的循環碼、卷積碼、交織、 viterbi譯碼等前向糾錯技術。
  20. According the product code scheme proposed in nsfc projects, in that scheme, the product code has a special structure and uses the cyclic redundancy check ( crc ) to detect whether the information is decoded correctly

    依據課題所研究的乘積編碼，利用其特殊構造，使用循環冗餘校驗作為譯碼是否正確的判決，從而使乘積編碼的行列交替約束，實現約束維特比譯碼。
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