輸入級 的英文怎麼說

中文拼音 [shūrùjí]
輸入級 英文
input stage
  • 輸 : Ⅰ動詞1 （運輸; 運送） transport; convey 2 [書面語] （捐獻） contribute money; donate 3 （失敗） l...
  • 入 : Ⅰ動詞1 （進來或進去） enter 2 （參加） join; be admitted into; become a member of 3 （合乎） conf...
  • 級 : Ⅰ名詞1 （等級） level; rank; grade 2 （年級） any of the yearly divisions of a school course; gra...
  • 輸入 : 1 （從外部送到內部） import 2 [電學] input; entry; entering; in fan; fan in; 輸入變壓器 input tra...
  1. Most computer programs introduce or delete the dependent variables in a stepwise manner.

    大部分計算機程序均以逐級計算方式來輸入或刪除某些應變量。
  2. The 1mhz fixed frequency switching allows for tiny external components and the regulation scheme is optimized to ensure low emi and low input ripple. an external resistor sets the full - scale led current, while two digital inputs control on / off and select amongst three levels of brightness. the circuit operates in 1x mode until just above dropout

    工作在1mhz固定頻率，採用線性調制模式使輸入紋波大大減小;利用一個外部電阻可以設置滿量程led電流;外接兩個數字信號控制晶元開關並選擇led三級亮度中的一級;具有過溫、過壓/欠壓等保護功能，工作溫度范圍為- 40 + 85 。
  3. A complementary input stage, which consists of a p - channel pair and a n - channel pair, was used in the circuit, so that the common mode input range can extend from rail to rail. a dcls is used to shift the n - transistor curve leftward to overlap the p - transistor curve properly and keep constant transconductance in the whole common mode input range

    輸入級採用pmos差分輸入對和nmos輸入差分對並聯的結構，從而實現共模輸入范圍擴大到電源的正負兩端，並且通過兩個源級跟隨器平移nmos輸入管跨導曲線，使nmos輸入管和pmos輸入管跨導曲線的適當交疊，從而保持了這個輸入級的跨導在整個共模輸入范圍內保持恆定。
  4. He inserted his smart card in the payer slot of his " portamento ", as the palm - sized debit credit machine was called, and punched in his pin to agree to have the amount of the bill debited from his card and credited to the supermarket s card in the payee slot

    他把聰明卡插入他自己的輕便錢箱手掌大小的電子收支機的付款槽，輸入個人密碼，表示同意自他的聰明卡扣除帳單所示款額，並把款項支入已插在收款槽里超級市場的聰明卡。
  5. 2. the input stages of the ccii and the operational amplifier in transimpedance implifier are realized with folded cascode amplifier to reach high cmrr, large open loop gain and low offset

    2 .為了提高儀表放大器的電源抑制比，並得到大的開環增益，相對低的失調等性能，電流傳輸器的輸入級和跨阻放大器中運算放大器輸入級均採用折疊共源共柵放大器。
  6. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電壓低功耗技術做了廣泛的調查研究，分析了這些技術的工作原理和優缺點，在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時，為了使輸入共模電壓范圍達到軌至軌，不是採用傳統的差動輸入結構，而是採用了nmos管和pmos管並聯的互補差動輸入對結構，並採用成比例的電流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中，電流鏡負載並不是採用傳統的標準共源共柵結構，而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在輸出級設計時，為了提高效率，採用了推挽共源級放大器作為輸出級，輸出電壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計，採用了帶電流鏡負載的差分放大器設計了一個基準電流源，給運放提供穩定的偏置電流和偏置電壓，保證了運放的穩定性;並採用了帶調零電阻的密勒補償技術對運放進行頻率補償。
  7. In the third chapter, a methodologies to realize second - order band - pass filter with which center frequency tuned in a wide range using mcdi ( multiple output current - mode differential integrator ), these two kinds of mcdi are composed of pmos and nmos input transistors respectively, lastly we compare these two integrators " merits and disadvantages

    第三章：提出了輸入級分別為pmos管、 nmos管的多輸出端電流模式全差分積分器，並由此構成了中心頻率連續可調的二階帶通濾波器，同時比較了二者的優缺點。
  8. The main work has been finished in paper is below : 1. all kinds of structure of low - voltage op - amp were compared and analyzed, such as the three - times current, redundant difference pair, dc level shifter input stage, large current output, very low - voltage output stage. 2

    對國內外的相關研究動態做了廣泛的調研，仔細比較了各種實現電路的優缺點，如輸入級的三倍電流鏡法、冗餘差分對法、電平移位法等，輸出級的大擺幅輸出級、超低電壓輸出級等。
  9. In the chapter 4, the basic concept and characteristics about the current model circuit and transconductor ( gm ) are given. in order to optimize the performance of gmce, four linearization techniques and the design of consequently successful circuits are investigated and proposed. at last, the four linearization techniques are summarizes

    第四章討論了電流模式電路及跨導器的基本概念及性能特點，重點研究並給出了改善輸入級傳輸特性的線性程度並擴大線性范圍的四種方法，介紹在這方面比較成功的一些電路設計，總結了這四種方法的異同點。
  10. The chip is accomplished in the full cooperation with other team members, the author pays particular attention to the analysis of the whole chip architecture and three sub - block design : transconductance amplifier ( ota ), voltage reference and current reference. based on existed technologies, a new high order temperature compensated voltage reference and a creative current reference with high order temperature compensation are shown respectively. the author simulated all the sub - block and whole chip by hspice

    該晶元的設計是由小組成員共同完成，本人主要負責了總體電路的分析、聯合模擬驗證及以下三個子電路的設計: 1 、跨導放大器，詳細分析了bandgap跨導放大器輸入級的動靜態特性及其優缺點，並結合系統要求，設計了一種與cmos工藝相兼容、可替代bandgap跨導放大器的低壓共源共柵跨導放大器。
  11. Using sige bicmos darlington configuration as the input stage, the input resistance is increased by the mos devices while the transconductance of sige hbts is maintained. in the same time, the equivalent input noise is controlled well because of the sige hbts ’ good noise performance in the input stage

    輸入級的設計採用sigebicmos達林頓結構，在保留sigehbt高跨導優勢的基礎上充分利用mos器件來提升運放輸入電阻，此外，基於輸入級中sigehbt良好的噪聲特性，運放的輸入參考噪聲電壓可以大大降低。
  12. Specifically analysed and presented the common - mode differential input stage, linear transconductance control circuit of input stage, current sum circuit, floating ab - class control output stage, the bias circuit of op amps and the bandgap reference current source circuit

    具體對運放的共模差分輸入級、輸入級線性跨導控制電路、電流和電路、浮動ab類輸出級電路、運放的偏置電路和帶隙參考電流源電路進行分析設計。
  13. Also discussed the methods on how to realize the cwt both in time - domain and frequency - domain and how to design the gm - c bandpass filter used in realization of cwt. in order to optimize the performance of gm - c filter, linearization techniques are investigated and proposed. due to process variation and parasitics, an automatic tuning is designed for center frequency / 0 and quality factor q also, in this thesis, 16 - channel analogue cmos cwt circuit has been realized

    論文圍繞連續小波變換的模擬電路實現這一熱點問題，討論了連續小波變換的時域和頻域實現方法；具體分析了并行結構與串列結構的優缺點；研究了頻域法中的跨導-電容帶通濾波器的設計；給出了改善跨導輸入級傳輸特性的線性程度並擴大線性范圍的具體方法；設計了片內自校正（可調諧）環節使濾波器參數自動調整到設計標準值；最後給出了16通道濾波器組實現小波變換的方法。
  14. The other is the design of amplifier with constant trans - conductance ( gm ) rail - to - rail input stage. when common mode input voltage changes, it provides nearly constant - gm independent of input transistor operating region ( strong, moderate or weak inversion ), and the quiet nods of the circuit for current addition and the output stage keep unchanged

    當輸入共模電壓變化時，不管它的輸入mos差分對管處于強反型區還是弱反型區，輸入級的跨度保持不變，而且輸入級後面的電流加法電路和輸出級的靜態工作點也不會隨之改變。
  15. During the process of designing the core cell, a novel continuous common - mode feedback structure has been proposed, which is suitable for the input stage

    在核心單元研發過程中，實現了極零抵消的密勒補償方案，並提出了一種適用於輸入級單元的新型連續型共模反饋電路架構。
  16. Balanced input stage

    平衡輸入級
  17. At the input, output, and error output levels, you set the common properties of inputs, outputs, and the error output

    在輸入級、輸出級和錯誤輸出級，設置輸入、輸出和錯誤輸出的公用屬性。
  18. Data flow components can be configured at the component level ; at the input, output, and error output levels ; and at the column level

    數據流組件可在下列級別配置：組件級；輸入級、輸出級和錯誤輸出級；列級。
  19. For this, i adopt the new differential input stage to make input common mode range enlarged, and as far as possible not reduce its gain

    為此，採用了新的差分輸入級，使共模範圍增大，同時盡量不減少差分輸入級的增益。
  20. How to reduce noise figure of operational amplifier are studied in this paper. through design of a low - noise opa, introduce low - noise design of the input stage in detail. and with the analysis of computer, suitable sizes of the input apparatus are choosed. at last, by simmulation and verification on this opa, the result is satisfied

    研究了如何從電路結構上減少運算放大器的噪聲，以一種低噪聲運放為例，著重介紹輸入級設計，並藉助計算機分析選擇合適的輸入器件尺寸，最後通過對運放噪聲的模擬驗證，得到了滿意的結果。
分享友人
分享到 Line

分享到臉書