輸出緩沖器 的英文怎麼說

中文拼音 [shūchūhuǎnchōngqì]
輸出緩沖器 英文
ob
  • 輸 : Ⅰ動詞1 （運輸; 運送） transport; convey 2 [書面語] （捐獻） contribute money; donate 3 （失敗） l...
  • 緩 : Ⅰ形容詞1 （遲; 慢） slow; unhurried 2 （緩和; 不緊張） not tense; relaxed Ⅱ動詞1 （延緩; 推遲） d...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 輸出 : 1 （從內部送到外部） export 2 [電學] output; outcome; outlet; out fan; fanout; 輸出變壓器 output ...
  1. First, it is compressible and cushiony ; second, it can be transported to a long distance with a little power loss ; the last, its flux and velocity of flow are quite high, so the reaction time of the operators can been considerably shortened. aiming to solve the problems of vibrating machinery such as short life - span, poor cushion and high energy consumption, the writer, on the basis of characteristic of pneumatic mentioned, contrives a set of valve controlled pneumatic vibrator, which has larger output vibrating force and longer life - span with simple structure. then, it is applied to drive a vibrating screen and the result is fairly well

    文中針對氣動技術本身的特性及優點，如：可壓縮，具有緩沖性；能耗損失小，便於遠距離輸送；流量大、流速高，執行元件響應速度快等，以解決振動機械在應用過程中的緩沖、能耗以及使用壽命等問題為目的，設計出一套輸出激振力大、結構簡單、使用可靠的閥控氣動激振器，並將其成功地運用到振動篩上，取得了較好的效果。
  2. If the node is at, or near to, ground then a grounded guard ring will be appropriate, if it is at some other potential it may be necessary to use a high input impedance buffer amplifier, with its input connected to the node, to force the guard ring to the node potential

    如果被保護的節點的電位是（或接近）零電位，採用地線保護環最為合適；如果節點電位是其他值，那麼可以用高輸入阻抗放大器組成緩沖器，輸入端連接該節點，輸出端連接保護環。
  3. Clamping pto shaft

    帶緩沖器的動力輸出軸
  4. In the proposed method, the controller takes the buffer length as congestion indication, takes sources quality and bandwidth utility as object function so as to learn on line. as the controller outputs, the coding rate for input traffic sources and the corresponding user percentage are used to adjust the cells " arrival rate to the multiplexer buffer. compared with the previous method where cells " arrival rate is tuned only by the encoding rate and the encoding rates for all input traffic sources are regulated in a body, the proposed method guarantee that the quality of cells are optimal while cell loss rate is minimized, which means quality of service is guaranteed

    在該方法中，擁塞控制器以緩沖區大小信元作為擁塞指示，以信源質量和帶寬利用率作為目標函數進行在線學習，控制器輸出包括信源編碼率及其對應的用戶數在全部用戶中所佔的百分比，即根據信源編碼率及對應的用戶百分數調整信源輸入流，從而克服了以往擁塞控制方法中僅僅調整編碼率帶來的對所有信源進行整體調整的缺陷，使控制系統在信元損失率最小情況下確保信源輸入流質量最高，從而有效地利用了網路帶寬。
  5. During this time, line buffer 2, which was presumed to be full, will empty itself into the output paths, on the right of the illustration.

    這時，行緩沖器2假定是滿載的，則向圖右邊的輸出通道卸載。
  6. We use a colorful noise to describe traffic flow and regard it as the uncontrolled input ( equaled to noise ). then we use the multi - rate sampling pi controller to eliminate the error caused by noise, and make the length of queue stabilize at the threshold. the availability of the strategies and stability of systems are proved by doing some analysis and simulation

    文中我們將一有色噪聲看作不可控輸入的擾動，採用基於pi的多采樣速率控制器以消除由此不可控輸入所造成的對系統輸出（交換節點緩沖區隊列長度）誤差的影響，使得系統輸出（隊列長度）穩定在閾值附近。
  7. The evaluation method of element in state transition matrix is given when the wrong order of data packet is considered. considering the wrong order of data packets, the mathematic model of networked control systems with long time delay is developed. the sufficient and necessary conditions for stochastic stability of such networked control systems with long time delay are given

    分析了長時延網路控制系統的二階矩穩定性和隨機穩定性；針對網路傳輸中的數據包的時序錯亂問題，提出了第二緩沖器的方法；分析了網路誘導時延的markov特性，並給出了時延markov鏈的狀態轉移矩陣中元素的求取方法；建立了存在數據包時序錯亂時長時延ncs的數學模型，並給出了對應的長時延ncs隨機穩定的充分必要條件。
  8. Become a kind of new electronics circuit - current - mode circuit. it is replacing the traditional design method of the voltage - mode in the high frequency high - speed signal processing realm 。 this thesis mainly discussed the modified second - generation current conveyors based on the current - mode kinds of new cuicuit components, they are stronger modified standard current - mode parts in fuctions on this foundation. mainly including the modified differential difference current conveyor ( mddccii ) 、 the fully balanced second generation current conveyor ( fbccii ) 、 ( full balances ) four - terminal floating nullor ( fbftfn ) and the current differencing buffered amplifier ( cdba ), they are all function very strong standard current - mode parts, they all can provide some circuit functions of better than general operation amplifier, because they have the voltage importation and the current importation, therefore use it since can carry out the voltage - mode signal processing circuit expediently, can also carry out the current - mode signal processing circuit expediently, and have to increase the benefit bandwidth to accumulate more widely than the voltage - mode, but have their advantages more according to the current - mode filter of the modified current conveyor, because it constitutes in brief, the filter wave function is stronger and they are better than in general use operation amplifier of many advantages, be easy to composing for example 、 high speed 、 frequency bandwidth 、 the power supply voltage requests low 、 consume small, the impedance is different from etc. advantages, otherwise they have biggish dynamic range, and flexible circuit synthesize, so they are the best active parts

    從第二代電流傳輸器ccii入手，重點研究了以下幾種改進型的第二代電流傳輸器:改進的差動差分電流傳輸器mddccii 、全平衡第二代電流傳輸器fbccii 、多輸出四端浮地零器ftfn 、全平衡四端浮地零器fbftfn 、電流差分緩沖放大器cdba的電路結構及其模型。然後在此基礎上系統地研究了基於這幾種改進型的第二代電流傳輸器的濾波器的設計方法，主要方法和結果如下:利用mddccii設計了差分式連續時間電流模式低通、帶通濾波器;電流模式跳耦結構考爾低通濾波器;利用fbccii設計了帶通二階節濾波器及電流模式雙二階通用濾波器;設計了基於多輸出端ftfn的電流模式二階通用濾波器電路;通過數字化開關選擇的基於fbftfn的電流模式通用濾波器;設計了基於最少個數電流緩沖放大器（兩個cdba ）的多功能通用電流模式濾波器及其在非理想因素情況下分析。設計濾波器的主要方法是採用級聯設計、運算模擬（信號流圖法）和反饋設計（跳耦法） 。
  9. Ibis 3. 2 electronic design automation libraries - part 1 : input output buffer information specifications ibis version 3. 2

    電子設計自動化程序庫.第1部分:輸入輸出緩沖器信息規范
  10. In the design of the spll, srd takes the input of a crystal oscillator and generate very sharp and narrow pulses

    在振蕩器之後，本文加了一個緩沖放大器，它起到放大輸出功率和改善頻率穩定度的作用。
  11. With regard to the flow regulation of the best - effort traffic, the controllable traffic in high speed computer communication networks, the present paper proposes a novel control theoretic approach that designs a proportional - integrative ( pi ) controller based on multi - rate sampling for congestion controlling. based on the traffic model of a single node and on system stability criterion, it is shown that this pi controller can regulate the source rate on the basis of the knowledge of buffer occupancy of the destination node in such a manner that the congestion - controlled network is asymptotically stable without oscillation in terms of the buffer occupancy of the destionation node ; and the steady value of queue length is consistent with the specified threshold value

    本文從控制理論的角度出發，針對計算機高速網際網路中最大服務交通流即能控交通流的調節問題提出了一種基於多速率采樣的具有比例積分（ pi ）控制器結構的擁塞控制理論和方法，在單個節點的交通流的模型基礎上，運用控制理論中的系統穩定性分析方法，討論如何利用信終端節點緩沖佔有量的比例加積分的反饋形式來調節信源節點的能控交通流的輸入速率，從而使被控網路節點的緩沖佔有量趨于穩定;同時使被控網路節點的穩定隊列長度逼近指定的門限值。
  12. The current in the dac ’ s output can drive the load, and the structure can save a buffer consisted of operational amplifier, so the structure can achieve high speed with no close - loop and feedback in this circuit

    該10位分段式電流舵型數模轉換器的輸出端可直接用電流輸出來驅動負載阻抗，省去運算放大器構成的輸出緩沖，整個電路中沒有形成閉環和反饋，因此這種電路結構可以達到很高的速度。
  13. The hardware designing include the interface with engine controller, such as d / a conversion. we chose the ad75089 which was produced by ad corp. this is a parallel port digital to analog conversion, and i give the presentation about its structure and connection scheme. in order to resolve the contradiction between faster computation and slower display, a buffer storage also needed

    第二部分詳細陳述了高速數據傳輸卡的軟、硬體設計過程，硬體設計包括dsp與pci總線的介面、 dsp與外部控制器的介面、以及電路卡上的擴展數據緩沖區的設計，並使用專門的工具軟體protel繪出全部硬體電路的設計原理圖。
  14. A record operation that writes all i / o buffers to a file if they haven ' t already been written

    將所有輸入輸出緩沖器的內容寫入一個文件中的一種記錄操作。
  15. An output buffer amplifier used in detection circuit of micro sensor

    用於微傳感器讀出電路的輸出緩沖放大器
  16. The fetcher also generates a search address for output to the branch target buffer

    指令讀取器亦產生搜尋位址輸出至分支目標緩沖器中。
  17. In a dpcx program, a type of form used to address data sent to the output full screen processing buffer

    在分散式處理控制執行程序（ dpcx ）中，一種用於對送到輸出全屏幕處理緩沖器的數據進行尋址的形式。
  18. In the description of circuit design, the emphasis is paid the following hardware modules : ad / da inverter, dsp module, external program / data memory, cpld control logic, serial communication module, power module, and so on. problems and the corresponding solutions found in the design and debug stage are discussed, too. finally, the low - level software driver design is presented in detail, including system booting, initialization of dsp registers, cpld logic and timing control, drivers for asynchronous communication fifo, and drivers for ad converter

    在電路模塊分析中，重點介紹了語音的輸入放大和輸出緩沖部分、 ad da轉換、 dsp語音壓縮解壓、外部程序數據存儲器、 cpld邏輯控制、串列收發組件、電源供電以及dsp的jtag介面等等，並且給出了在硬體電路設計和調試過程中的問題與解決辦法。
  19. Input output buffer information

    出入輸出緩沖器資訊規格
  20. With the versions of the plug - in and extension used in this article, a breakpoint function is required because php buffers output before sending it to the browser

    對于本文中使用的插件和擴展的版本，斷點功能是必需的，因為php在把輸出發送到瀏覽器之前會緩沖它。
分享友人
分享到 Line

分享到臉書