邏輯轉換 的英文怎麼說

中文拼音 [luózhuǎnhuàn]
邏輯轉換 英文
logical conversion
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 轉 : 轉構詞成分。
  • 換 : 動詞1. （給人東西同時從他那裡取得別的東西） exchange; barter; trade 2. （變換; 更換） change 3. （兌換） exchange; cash
  • 邏輯 : logic
  • 轉換 : change; transform; convert; switch
  1. The system comprises three modules : the first is the ccd driver module, which controlled with cpld. programming the cpld to produce ccd driving pulses and synchronized communication signals. after preprocessing, the output video signals are transmitted into high resolution adc module, in which they are converted into digital signals, and then processed in arm processing module

    整個系統分為三個模塊: ccd驅動模塊的核心是一片復雜可編程邏輯器件（ cpld ） ，對其編程產生ccd的驅動脈沖及同步控制信號;視頻輸出信號經預處理后，由高精度ad轉換模塊進行采樣，將ccd輸出的模擬信號轉換成數字量;最後，將數據送入arm處理系統中進行后續處理。
  2. We have implemented a series of algorithm, which includes rule adornment, logic program adornment and factorization, magic transformation, factorizing magic transformation. the platform is characteristic of transplant, expansion

    處理器中實現了本文中用到的一系列演算法，其中包括：規則修飾、邏輯程序的修飾、魔集轉換、邏輯程序的分解、分解的魔集轉換。
  3. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  4. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  5. In addition, make out in detail the design on inner combination logic and time logic of fpga, including series - parallel conversion, data selector, counter, flip - latch, timer, encoder, etc. at one time, not only pursuit flow of the data gathering system is illuminated, but also make use of in reason and effectively inner ram resource of fpga and build it in ping - pong framework

    另外，詳細的介紹了fpga內部的組合邏輯和時序邏輯的設計方案，包括串並轉換、數據選擇器、計數器、鎖存器、定時器、譯碼器等。並闡述了數據採集系統的工作流程，而且合理有效地使用了fpga內部的ram資源，將其構建成乒乓式結構。
  6. The hardware has two input channels of high - speed analog signal, with the signal amplitude of 0 - 5v, the conversion precision of 12bits, and the maximum sampling rate of 400ksps. this system includes 4 dsps ( adsp 2181 ), which can be arranged as a pipe line processing array. many algorithms can be realized in this system

    系統硬體有兩路模擬數據採集通道，模擬信號輸入范圍為0 ? 5v ，轉換精度為12位，最高采樣率400ksps ；系統包含4片dsp （ adsp2181 ）構成的流水線型的處理陣列，可用於實現各種演算法；系統的控制邏輯由fpga完成。
  7. Based on the endogenous growth theory, this paper views technologica 1 progress as an endogenous variable in the comparative advantage model, and therefore s ets up a more systematic comparative advantage theory to the extent of investment, divisi on of labor and institution. third, it has analyzed the trade structures based on different c omparative advantage strategy, made an empirica l study of china ' s foreign trade structure, and concluded that although china ' s export structure at present is characterized by capita l - technology intensive goods, these goods have the comparative disadvantages from now to the near future in china, which means that trade structure transformation in less develo ped countries should be based on endogenous comparative advantages. finally, it has disc ussed the strategy and paths of china ' s transformation of foreign trade structure

    本文借鑒內生經濟增長理論的邏輯思路，將技術進步在比較優勢模型中內生地決定，分別從投資、分工與制度三個層面建立了較為系統的內生比較優勢理論；再次，對其于不同比較優勢理論的貿易結構進行了剖析，對中國外貿結構進行了實證分析，認為盡管中國現在出口商品結構是以資本技術密集型產品為主，但中國在目前乃至將來的一定時期內的資本及技術密集型產品上仍將處于比較劣勢，發展中國家貿易結構的轉換必須基於內生比較優勢；最後，探討了中國對外貿易結構轉換戰略與路徑。
  8. However, in search of the relevant data, the cost of generating additional tuples produced by logic program to which magic transformation is applied increases with the arity of idb ( intensional database ) predicates increasing

    但是隨著遞歸idb （ intensionaldatabase ）謂詞的項的個數增大，經魔集轉換的邏輯程序為尋找與查詢相關數據而產生附加元組的開銷也會增大。
  9. Following the guidance of the legislatorial tenets, applying nomological analysis and logical inference, this article probes the original legislatorial idea of sihuan system, comprehends hermeneutically the law articles of sihuan by switching approach angle, analyses several misunderstandings in judicatory practice in the light of some important cases which were exposed recently, and thereupon brings forward several suggestions on how to improve and perfect the sihuan system so as to exert the influence of sihuan system sufficiently in judicatory practice

    我們以死緩制度的立法宗旨為指導，運用法理分析與邏輯推理等方法力求探尋死緩制度的立法本意，轉換思維角度解讀死緩制度的法律條款，並結合近期披露的一些重大案例，剖析死緩在司法實踐中適用的幾個誤區，進而提出如何在立法上與司法中完善和改進死緩制度的幾點建議，以期死緩制度的優越性在司法實踐中能得到更為充分的發揮。
  10. The ina128 is used by left leg ' s driver circle and the aims are to enhance the cmrr and reduce the disturbance of 50hz. the part of a / d transmitting chip is the adc0809 which have a eight - channel transmitter, a eight - bit a / d transmitter and the logical control by microprocessor

    考慮到家庭監護的實際應用，精度的要求不是很高， a / d轉換器採用的是adc0809 ，它有8通道多路轉換器、 8位模/數轉換器和與微處理器兼容的控制邏輯電路。
  11. This thesis focuses on the ingress process module of ctu, which translates c - 5 dcp format to rainier 4gs3. the specification analysis, architecture and logic design, functional simulation testbench design, synthesis report and testing result are discussed in this thesis. the research work mainly includes : the specification analysis and design requirements of ctu logic ; the architecture and logical design of ingress process module, which includes receive control fsm, send control fsm and cell position adjustment logic ; the performance improvement of ingress process module to receive and transmit data cell at the full line speed

    本論文的主要研究工作包括：通信協議轉換邏輯的功能分析和設計需求；通信協議轉換邏輯上行方向的系統分析及體系結構設計，包括上行接收狀態機、發送狀態機、信元內位元組位置調整機制等的設計；通信協議轉換邏輯上行方向的線速設計，主要是上行接收的線速設計，要使用流水設計技術；提出了高速實現roundrobin調度策略的實現方法，並設計實現了桶式移位器和優先級編碼電路；應用bfm模擬模型設計了上行處理各模塊的模擬testbench ，完成了各級模塊的模塊模擬和系統集成模擬。
  12. Converts the specified string representation of a logical value to its

    將邏輯值的指定字元串表示形式轉換為它的等效
  13. In field of deductive database, magic transformation is an evaluation strategy that combines top - down with bottom - up. it restricts the computation of logic program to tuples that are related to the query

    在演繹數據庫領域中，魔集轉換是一種自頂向下和自底向上相結合的計算策略，它使邏輯程序的計算始終限制在與查詢相關的數據中。
  14. Functions of logic synthesis are to transform and optimize the combinational logic functions and produce the pure logic level structural description

    邏輯綜合的功能是對組合邏輯函數的描述進行轉換和優化，生成與邏輯功能描述等價的優化的邏輯級純結構描述。
  15. Based on many other circuit formats, a new kind of logic - level circuit representation, called unified middle - level circuit format ( umcf ), is defined in this paper, in which some special operations on circuit related with power estimation and low power design. umcf can not only interchange circuits of different formats, but also convert circuits to hspice acceptable files, which can be used for transistor level power estimation

    本文結合多種不同的電路格式，自主定義了一種邏輯級電路的中間表示形式（稱為umcf ）和一系列極具特色的與低功耗技術相關的操作，它不但可以實現與其他多種電路格式之間的相互轉換，還可以將電路直接轉換成hspice可以接受的文件，進行晶體管級的電路功耗估計，這樣可以在公認的高精度的功耗模擬器上，對本文的結果進行有效的驗證。
  16. The new institutional economics ' model transformation and its brand - new logic interpretation power

    新制度經濟學的範式轉換及其全新的邏輯解釋力
  17. Political - philosophical analysis of the transition from logic of revolution to logic of being in power

    革命邏輯向執政邏輯轉換的政治哲學分析
  18. Ti ? the rate of change of the input voltage waveform during a logic transition ( low - to - high or high - to - low )

    在邏輯轉換期間，輸入電壓信號波形的變化率（由低到高或由高到低） 。
  19. A meta - trigger table is created to fulfill user - customization because in reality business conversion functions are changeable and unforeseeable

    針對業務轉換函數的不可預見性，通過建立元觸發器表，實現了業務邏輯轉換函數的可定製。
  20. In the hardware, the conversion from serial port, parallel port or usb port to jtag port is realized by a cpld component, by which the volume of the emulator can be reduced and its reliability can be enhanced as well. the feature of this paper is the design of software section

    硬體部分主要採用了cpld器件來實現串口，並口， usb口到jtag口的邏輯轉換，採用cpld器件來實現此轉換功能不但減小了模擬器的體積，而且還增強了模擬器的可靠性。
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