重摻雜層 的英文怎麼說

中文拼音 [zhòngchānzácéng]
重摻雜層 英文
heavily doped layer
  • 重 : 重Ⅰ名詞（重量; 分量） weight Ⅱ動詞（重視） lay [place put] stress on; place value upon; attach im...
  • 摻 : 摻動詞[書面語] （持; 握） hold
  • 雜 : Ⅰ形容詞（多種多樣的; 混雜的） miscellaneous; varied; sundry; mixed Ⅱ動詞（混合在一起; 攙雜） mix; blend; mingle
  • 層 : i 量詞1 （用於重疊、積累的東西 如樓層、階層、地層） storey; tier; stratum 2 （用於可以分項分步的...
  • 摻雜 : 1. mix; mingle2. doping; inclusion; addition; adulteration
  1. The main work of this thesis is to study of electronic structure of cathode material. some structure paramters, such as total energy, atomic net charge, atomic overlap population, of the model li5mn4o83 +, li5mn12o24 -, li7co6o2015 -, li7ni6o2015 -, li5mn2co2o83 +, li5mn2ni2o8 are calculated

    論文重點研究了正極材料電子結構，通過對尖晶石型錳系材料模型li5mn4o83 +和li5mn12o24 -和層狀結構的li7co6o2015 - 、 li7ni6o2015 -模型以及摻雜模型li5mn2co2o83 + 、 li5mn2ni2o8的計算，得到了各個原子簇體系的總能量、凈電荷分佈、原子重疊布居值。
  2. According to the thickness of the soi film, high voltage ic based on soi material ( soi - hvic ) can be divided into thin - film and thick - film. for thin - film soi - hvic, linear drift region doping profile is adopted to satisfy a certain breakdown - voltage, but this process is too complex and its self - heating effect is obvious ; for thick - film soi - hvic, it can take advantage of cmos technology on silicon to obtain the high voltage

    Soi高壓集成電路根據頂層硅厚度可分為厚膜和薄膜兩大類。為了滿足一定的擊穿電壓，薄膜soi高壓電路一般採用漂移區線性摻雜技術，但其工藝復雜，且自熱效應嚴重;而厚膜soi高壓集成電路可以通過移植體硅cmos技術來實現高壓，但是由於其硅膜較厚，介質隔離成為厚膜soi高壓集成電路的關鍵技術。
  3. The abrupt heterojunction diode is composed of a 1 m thick heavily doped n - type sic layer and a 0. 4 m thick lightly doped p - type sic1 - xgex layer with varied composition ratios

    在這個異質結中， n型重摻雜3c - sic層的厚度為1 m ， p型輕摻雜sicge層厚度為0 . 4 m ，二者之間形成突變異質結。
  4. As far as the new technology of selective diffusion, the method of printing is used and the phosphoric paste ( high concentration ) is printed at the electrode - site in silicon. afterwards, a thin layer of phosphoric source ( low concentration ) is sprayed on the surface of the non - electrode - site in silicon

    在選擇性擴散新工藝中，我們採用絲網印刷電極的方法在矽片的電極位置印刷濃度較高的磷漿（摻磷sio _ 2乳膠） ，在非電極區噴塗一層濃度較低的磷源，擴散后形成重摻雜和輕摻雜。
  5. According to our theoretic analysis and the realistic fabricating condition, the boa device with double - heterostructure gaas / gaalas has been proposed to obtain 3db bandwidth greater than 2. 5 ghz, half - wave voltage about 5v, extinction - ration less than - 40db, transmission loss of tm mode greater than 45db and transmission of te mode less than 0. 15db. to obtain higher switching speed, we proposed that traveling - wave electrode is applied to boa device

    我們選擇在sigaas襯底上生長重摻雜層，通過控制其厚度來設計速度匹配的boa光開關行波電極，實現boa光開關的高速和高帶寬，本文結合boa型光開關的特點提出一種行波電極型boa光開關結構，其理論3db調制帶寬大於20ghz 。
  6. In the new structure, a n + buffer layer is introduced into the bulk silicon substrate with a triple - diffusion process. the new structure has two features : one is the feature of npt - igbt : the thin and lightly - doped p + layer and the high lifetimes of the carriers ; the other is the feature of pt - igbt : n7n + structure which can make the n " region very thin

    新結構用三重擴散的方法在n ~ -單晶片上引入了n ~ +緩沖層，仍然保留了npt - igbt中薄而輕摻雜p層和高載流子壽命的本質優點，同時又具有pt - igbt中n ~ - （ n ~ + ）雙層復合的薄耐壓層（即薄基區）的優點。
  7. Thus it is considered that the technique of dz formation by means of rtp may not be suitable for heavily boron - doping cz silicon. since the higher concentration vacancy could decrease the stress inducing by oxygen precipitates, the size of the oxygen precipitation with higher density was smaller in the hb si samples in comparison with the samples without rtp pre - annealing. moreover, as for the technique to generate dz by rtp in lightly boron - doping samples, it was found that the behavior of oxygen precipitation and dz was determined by the annealed temperature, followed annealing and ambient of rtf as well

    結果顯示，對于普通輕摻矽片能形成明顯的很寬的潔凈區的rtp預處理工藝，應用於重摻硼樣品時沒有潔凈區形成，所以rtp預處理獲得潔凈區的工藝不適用於重摻硼矽片，硼的大量摻雜對氧沉澱促進效果大於高濃度的空位對氧沉澱的洲排浙江大學碩士學位論文李春龍：直拉重摻硼硅單晶中氧沉澱的研究促進效果；大量空位的引入，有利於釋放氧沉澱生長過程的內應力，適當增加重摻硼樣品氧沉澱密度，減少其尺寸，並伴有層錯生成。
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