architecture simulation 中文意思是什麼

architecture simulation 解釋
體系結構模擬
  • architecture : n. 1. 建築學。2. 建築（樣式、風格）；建築物。3. 構造，結構；【自動化】（電子計算機的）架構，體系結構。
  • simulation : n. 假裝；模擬；裝病，裝瘋；【生物學】擬態，擬色。
  1. Based on vc and opengl software platform, as a part of integrate planar mechanism analysis and simulation cai, the mechanism theory has been adopted to analysis the movement trace and profile of linkage ; adopt oriented object method to capsulate the class module. each corresponding class module complete parameter storage and process ; adopt message - map, message - trigger to organize the programming and response the user " s input ; use the document - view structure of the visual vc + + mfc class foundation as the basis of the programming architecture to complete those functions. use oriented object method to product the following class module : control class, render class, document class, mechanism class and other classes ; adopt opengl library to draw the three dimensional graph based on the result of mechanism analysis ; use model transforming, lighting, material, color, frame - buffer, display - list, graphics - component combine etc to draw the three - dimension mechanism and make the simulation of linkage has high reality

    本文敘述了平面連桿機構運動分析和可視化模擬的理論演算法及其編程實現方法，基於微機vc平臺，採用opengl圖形庫編程，利用面向對象的方法對機構進行功能封裝，利用vc + +的文檔視結構作為最基本的窗架，生成並控制三維繪制類、文檔類、主窗口類和一些輔助類，利用windows平臺的消息映射、事件驅動來組織程序運行和響應用戶反饋，利用機構分析得出坐標數據驅動opengl庫繪制三維機構圖形。
  2. In this dissertation, we mainly study the efficient architecture of channelized digital receiver, discuss the particular realization approaches, then testify them with simulation

    本文主要研究了通道化數字接收機的高效結構，討論了具體實現方案並進行了模擬驗證。
  3. According to the research, the major work done is as following : < 1 > analyzes the symmetric - key encryption algorithm des and dissymmetric - key encryption algorithm rsa, and makes them easy to realize in hardware. < 2 > according to the algorithms and the thought of reconfigurable computing, the dissertation accomplishes the design of 64 - bit des system architecture and the design of 256 - bit ~ 1024 - bit rsa system architecture. < 3 > using the top - down high level design methodology and the hdl language, accomplishes the description of the des / rsa designs, the simulation and the synthesis

    本論文主要的研究工作： < 1 >對現有的對稱加密演算法des演算法和非對稱加密演算法rsa演算法進行分析，使其易用硬體實現； < 2 >基於可重構思想和特點，完成64位des演算法和256位1024位模長rsa演算法的可重構硬體的設計； < 3 >採用自頂向下的設計方法，利用hdl語言對des / rsa設計進行功能描述，並完成軟體模擬，綜合和布線； < 4 >在可重構計算驗證平臺上進行演算法驗證，並對設計的可重構和設計的進一步優化進行討論。
  4. The chip simulation network laboratory system this paper disguessed is a distribute network simulation system based on lan. the system ' s architecture is a c / s of three lays. the front platform are the chip simulation network system application program terminer ; the middle lay is a dcom server, it ' s duty is to deal with the communication and data transmission between the terminer and then database server, and to execute the logical operation. the application program just connect with the middle lay and get data from it, the connection and operation with database server will be managed by the dcom server. the duty of database server is to access and backup the final data

    具體是由位於網路各個終端的晶元模擬網路實驗系統應用程序為前臺；中間層為dcom應用程序服務器，負責處理前臺應用程序與后臺數據庫的通信和數據傳輸，並執行業務邏輯，前臺應用程序只需要與應用程序服務器建立連接，在中間層操作數據即可，與后臺數據庫的連接和操作由應用程序服務器來統一管理操作。后臺數據庫只負責數據的存取操作。本論文實施的晶元模擬網路實驗系統模擬了主要的邏輯電路器件， 8088cpu ，存儲器，寄存器，數據總線，地址總線和控制總線，及其它相關晶元。
  5. In this paper, the transit instrument and the mono - lever manipulator ' s architecture features of the transit instrument training simulation system are analysed

    摘要闡述了經緯儀與經緯儀訓練模擬系統的單桿操縱器的結構特點。
  6. With the objective of developing distributed simulation system of frequency hopping ultrashort communication countermeasure system, the federation architecture and the complex envelop simulation block diagrams of fr transmitter and receiver are presented at first

    摘要以建立超短波跳頻通信對抗分散式模擬系統為目的，首先給出了聯邦的體系結構及跳頻發信機、接收機成員的復包絡模擬框圖。
  7. Neural network control is an important mode of intelligent control, and it is widely used in branches of control science, first, the architecture and the learning rule ( error back propagation algorithm ) of multiplayered neural network which is widely used in control system are presentedo especially, the paper refers to the architecture of diagonal recurrent neural network and its learning algorithm - - - - - recurrent prediction error algorithm because of its faster convergence with low computing costo next, before introducing the neural network control to the double close loop dc driver system, the controllers of current and velocity loop are designed using engineering design approach after analysis of the system, simulation models of the system are created

    神經網路控制是智能控制的重要方式之一，它廣泛應用於自動控制學科各個領域。本文首先敘述了控制系統中常用的多層前饋網路結構及演算法（ bp演算法） ，特別提及了能夠較好描述系統動態性能的對角遞歸神經網路和在用遞推預報誤差演算法訓練drnn時取得了較快的收斂速度。其次，應用工程方法分析設計了tf - 1350糖分離機的電流、轉速雙閉環直流調速系統的控制器，作為引入神經網路控制的設計基礎，並建立了系統的模擬模型。
  8. Cryptogrammic chip introduced in this paper has been tested on the altera ' s apex20ke fpga. the main clock frequency reached 40mhz. the chip includes 30, 000 les. in order to utilize esb resource in altera ' s chip, we adopted embedded rom and ram and can realize the function of whole system with only one chip. lt is the embodiment of methodology and notion of sopc ( system on a programmable chip ). the simulation of this cryptogrammic chip proves the correctness of function of the chip, which shows that the important ideology based reconfigurable architecture has special significance in designing of cryptogrammic chip

    本文所闡述的密碼晶元在altera公司的apex20kefpga上進行了測試。工作頻率達到了40mhz ，佔用了3萬個le . ，利用altera器件的esb資源，採用內置ram和內置rom設計方法，用一片晶元即可實現整個系統的功能，充分體現了sopc的設計方法和理念，對晶元的模擬和測試均證明晶元功能正確，表明基於可重組體系結構這一重要思想在密碼晶元設計中具有特殊的意義。該晶元的設計遵循hdl設計方法學的一般方法。
  9. In the meanwhile, we build a complete simulation model of layered wireless self - organizing routing network and verify feasibility of network architecture and key technologies, including operating mode of wireless interface, addressing and routing in lwsrn we study the performance of wsrn in terms of routing overhead, packet delivery ratio, and the communication capability, and compare these result with that of ad hoc network

    同時，構造了完整的分層結構的無線自組織路由網路模擬模型。驗證了網路體系結構和關鍵技術的可行性，包括無線通道工作方式、網路編址技術、網路路由過程。並通過模擬分析了分層結構的無線自組織路由網路的路由負載、網路數據到達率和網路通信容量。
  10. Firstly, the crop - environment system was abstracted as many subsystems and physiological processes with object - oriented paradigm while many classes were established to simulate the behaviors of these subsystems and physiological processes. in vrgm, the document - view architecture in visual c + + was extended as model - document - view architecture for agricultural integrated system. in the model - document - view architecture, document gets the final simulation results by manipulating the models classes and acts as a communicating intermediacy between model and view

    首先利用面向對象的編程設計方法，將作物一環境系統抽象為多個子系統和多個生理過程，分別設計多個類模擬這些子系統和生理過程的功能，由於面向對象方法的封裝性、繼承性和多態性，類與類之間既相互獨立，又通過類間介面彼此相互關聯，使系統易於維護、擴充和重新開發利用。
  11. This thesis focuses on the ingress process module of ctu, which translates c - 5 dcp format to rainier 4gs3. the specification analysis, architecture and logic design, functional simulation testbench design, synthesis report and testing result are discussed in this thesis. the research work mainly includes : the specification analysis and design requirements of ctu logic ; the architecture and logical design of ingress process module, which includes receive control fsm, send control fsm and cell position adjustment logic ; the performance improvement of ingress process module to receive and transmit data cell at the full line speed

    本論文的主要研究工作包括：通信協議轉換邏輯的功能分析和設計需求；通信協議轉換邏輯上行方向的系統分析及體系結構設計，包括上行接收狀態機、發送狀態機、信元內位元組位置調整機制等的設計；通信協議轉換邏輯上行方向的線速設計，主要是上行接收的線速設計，要使用流水設計技術；提出了高速實現roundrobin調度策略的實現方法，並設計實現了桶式移位器和優先級編碼電路；應用bfm模擬模型設計了上行處理各模塊的模擬testbench ，完成了各級模塊的模塊模擬和系統集成模擬。
  12. In this paper, for 2 ~ 2000mhz broadband rf front - end, using subsection processing fixed intermediate frequency superheterodyne architecture, and combining with the actual component ’ s level, a broadband rf front - end system simulation platform is presented, which provided the universal, standardization, and modularization of transmitter and receiver

    本文針對頻率范圍2 2000mhz的寬帶射頻前端，採用分段處理的固定中頻超外差結構，並結合目前的器件水平，建立了一個通用化、標準化、模塊化的寬頻帶射頻前端發射機和接收機系統模擬平臺。
  13. A model architecture being made up of vehicle generation model, network model, traffic management and control model and car driving model ( car - following, lane - changing and event reaction model ). under the framework of model architecture, the kernel car basic driving micro - simulation models are developed. according to the characteristics of time - slice scan simulation, kernel models can provide flexible description of vehicle driving behaviors

    研究結果確立了車輛基本行駛微觀模擬模型的體系結構，該體系結構由車輛生成模型、路網描述模型、交通管理與控制方案模型及車輛行駛模型（跟車模型、換道模型和事件反應模型）構成，是基於netsim模型建立bdsim模型的框架。
  14. According to the distributing virtual environment in weapon system simulation and the basic project requirements of the factual application, the thesis studies deeply on the project requirement of the stage simulation software, which aims at the characteristics and requirements of the combat system in the simulation supporting environment. the main research results are as follows : 1. the thesis analyzes the architecture and the operation principle of stage, and designs stage application of the combat system simulation in the distributing virtual environment, and establishes a integrated scheme of the simulation supporting environment of combat system on the underwater platform

    本文根據分散式虛擬環境在武器系統模擬中的發展現狀以及工程實際應用的基本要求，針對水下平臺作戰系統模擬支撐環境的特點及需求，對stage軟體的工程應用進行了深入研究，主要研究成果如下： 1 、分析了stage軟體的體系結構和運作機理，對stage軟體在水下平臺作戰系統分散式虛擬環境的應用進行了設計，利用stage軟體確立了作戰系統模擬支撐系統的集成方案。
  15. In this paper the main work includes the analysis of the rotation of special angles, the range of rotation angles in cordic algorithm ; analysis on what condition should be fulfilled to reach any target angle ; analysis and simulation on error band and output spectrum ; imple - mentation of the architecture on fpga device

    我所做的只是很小一部分，主要包括對cordic演算法中特殊角的旋轉和旋轉角度范圍;在何種條件下可以達到任意角度的分析;對許多問題比如誤差上限和輸出頻譜的計算機模擬;這種結構在fpga器件上的實現。
  16. Study on simulation architecture and related problems of virtual globe war temporal - space

    虛擬全球戰爭空間模擬體系結構與相關問題研究
  17. The architecture of the al - based gws simulation system was proposed, and several key issues were discussed and the basic solutions to theses issues were given

    對虛擬全球戰爭空間模擬系統的體系結構、關鍵問題和解決思路進行了初步的探討。
  18. For the autonomous spacecraft is very complicated, carrying overall mathematical simulation to such a system is very difficult to realize by one computer only. according to the system ' s own characteristics, we can adopt hla ( high level architecture ) structure, distributing the simulation task to the nodal computer of each network

    根據探測器自主系統特點，本文將高層體系結構（ hla ， highleverarchitecture ）應用於深空探測自主技術模擬中，將模擬任務分佈到各個網路節點計算機上，實現了分散式的深空探測自主技術的模擬系統。
  19. The design of the torpedo acoustic homing system simulation platform based on hla ( high level architecture ) was proposed for the torpedo acoustic homing system and its battle environment

    摘要針對魚雷聲自導系統及其作戰環境，提出了基於高層體系結構（ hla ）的魚雷聲自導系統模擬平臺設計方案。
  20. High performance retargetable instruction - set architecture simulation technique

    高性能可重構指令集架構模擬技術
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