bus interface controller 中文意思是什麼

bus interface controller 解釋
總線介面控制器
  • bus : n （pl busses buses）1 公共馬車；公共汽車；客機。2 〈口語〉汽車，機器腳踏車；飛機。3 【電學】信息...
  • interface : n. 分界面，兩個獨立體系的相交處。vt. （-faced, -facing） 把界面縫合。vi. 交流，交談。
  • controller : n 1 管理人，主管人。2 （會計的）主計人，檢查員；〈英國〉（特指宮廷、海軍等的）出納官〈常作 comptr...
  1. On the basis of familiar with can bus and gsm communication, considering hev ( hybrid electric vehicle ) battery administrative system ' s demand for the host pc monitoring system, i have designed can - rs232 converter gateway to realize transmission the real - time data from can node to rs232 serial port, which is carried out by the project of at89c52 mcu + sja1000 can controller + 82c250 can controller interface. host monitoring software has accomplished real - time datas display, storage, historical datas graph analysis and storage fashion change from access to excel, at the same time, realized important datas transmission remotely with tc35 short message module. system software programs in assembly and vb

    Can - rs232轉換網關採用at89c52微處理器+ sja1000can控制器+ pca82c250can控制器介面實現對can總線節點通訊的監聽，並將其轉換成rs232串口電平發送到pc機串口，同時用siemens公司的tc35模塊和at指令實現現場採集系統重要數據和錯誤信息的短消息通訊。在上位pc機監控系統中，主要完成的是對串口設置的選擇控制、現場採集數據的實時刷新顯示、歷史數據的圖表分析及數據的access數據庫存儲和excel電子表格的轉換。系統軟體採用匯編語言和vb實現。
  2. The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module

    數據採集模式實現部分的大部分工作是在前面板上完成的，後面板主要是一些外圍電路。前面板採集卡上從物理上來說主要有四塊電路:符合電路，數據流控制器電路， sdram陣列和系統總線介面電路組成。後面板採集卡從總體物理上主要有四塊電路組成: 485串列通信電路， adc控制電路，心電數據處理電路和門控信號產生電路。
  3. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  4. During the design of vxi - bus serial controller module, the functions of vxi - bus including time - sequence for vxi interface, resource management, interrupt process, bus arbitration, are accomplished. to advance the performance and stability, the fpga technic is used to implement the kerneled code including serial bus time - sequence switching to vxi interface time - sequence, the uart, the parameterized baud generator and “ pipeling frame ”. the handle type of data transfer bus for vxi - bus is researched thoroughly, and the format of serial data transfer is designed

    在vxi總線串列控制器設計中，實現了vxi總線控制器的基本功能，包括vxi總線介面時序、總線仲裁、超時處理等;同時利用先進的fpga技術實現了串列總線時序向vxi總線時序的轉換、通用異步收發器（ uart ） 、參數化波特率發生器、流水線結構等功能模塊;在設計中還深入研究了vxi總線數據傳輸的各種操作類型，制定了串列數據傳輸的編碼格式。
  5. This thesis gives the design of an airborne datum communication board based on arinc429 bus, which is adopted dsp as controller, utilized bus interface chip hs - 3282 and use self - designed 429 electronic conversion circuit, then form a simple structure datum communication board with high dependability

    該通訊板實現了pc並口（ epp ）與arinc429協議間的通訊，採用dsp控制，利用arinc429總線介面晶元hs - 3282和自行設計的電平轉換電路，構成了一款結構簡單、可靠性高的數據通訊板。
  6. As a network bridge, communication controller is the interface device which realize the function of communication between supervise pc and field bus

    總線控制器作為管理計算機與現場總線的介面裝置，起到了管理計算機與智能儀表數據雙向傳輸的網橋作用。
  7. Based on s698 technology, obt - devsys - s698 is one of the serial s698 - mil application development systems including 32 - bit embedded processor with 32 64 - bit fpu 160mhz processing speed sram memory controller flash memory controller uart ps 2 led interrupter controller, etc. the bus interfaces is composed of i2c spi magnetic card interface and ic card interface. obt - devsys - s698 carries on the advantages of s698 serial module such as compact structure and reasonable composition

    Obt - devsys - s698是s698系列嵌入式處理器開發板中的一員，其上包括：具有32 64 - bit浮點運算單元的32 - bit嵌入式處理器，主頻160mhz ， sram存儲器， flash存儲器具有三路uart介面，一路ps 2介面， led發光二極體控制電路，中斷操作按鈕其外擴總線包括i2c總線介面spi總線介面磁卡介面智能卡介面等。
  8. In this project, the flaw - detecting card is designed based on pci bus while vud is on isa bus. this article briefly introduces the pci2040 pci - dsp bridge controller and its implementation of interface to hpi port of c5402. programming win9x virtual device driver ( vxd ) and the realization of win9x plug & play function are discussed also

    本文首先簡要介紹了一些有關超聲波探傷和虛擬儀器的基本概念，隨后對儀器的硬體和軟體的實現方案作了論述，重點闡述了使用pci2040橋晶元實現pci總線與dsp主機介面間的無縫連接。
  9. To build up the hardware environment, we fully implement the amba ahb bus, memory interface and codec controller

    在外圍設備中，我們完整地實現了ambaahb總線規范，以及內存介面單元。
  10. According to the necessity of cpci - gpib controller interface module, analyzing the cpci bus, gpib bus and interface function in detail, the design accomplished the function of bridging connection, conversion of protocol, logic control and so on

    本文根據設計cpci - gpib控制器介面模塊的需要，在詳細分析cpci總線、 gpib總線協議及介面功能的基礎上，完成了設計任務，並實地驗證了cpci與gpib總線之間的橋接、協議轉換、邏輯控制等功能。
  11. The main contents are as follows : the structure of mixed - signal circuit which newly - defined in ieee1149. 4 std is analyzed in detail, especially anolog boundary module and test bus interface circuit. on the basis of mixed - signal boundary scan technology, a scheme of mixed - signal boundary - scan test system is presented and the hardwares are implemented, including the controller and display unit

    主要研究的內容以及所作的工作如下:詳細分析了ieee1149 . 4標準中針對混合信號電路測試新增的結構，即模擬邊界模塊及測試介面電路。基於混合信號邊界掃描技術標準，提出混合信號邊界掃描控制器的設計方案並實現了其硬體設計，包括邊界掃描控制模塊、顯示驅動模塊等。
  12. The key to the 1553b bus system is to design 1553b data bus interface controller chip

    1553b總線系統的關鍵部分是協議介面控制器。
  13. Based on study of the vme, vxi, usb specification, serial communication and controller technic with comprehensive compaing the popular serial bus, we select the universal serial bus as the main communication interface between computer and this controller. then the theory and implement method of vxi - bus serial controller module are specially analyzed

    本文在對vme 、 vxi 、 usb總線規范、串列通訊技術和控制器技術深入理解，並全面比較當前流行的計算機串列總線技術的基礎上，選擇了usb2 . 0總線作為控制器與主控計算機通訊的主要介面，然後對vxi總線串列控制器的基本原理和實現方法作了深入細致的研究。
  14. This work is part of the design of 500m sampling digital storage oscillograph and the assignment is to develop the gpib ( general purpose interface bus ) instrument driver. the controller is able to operate the dso in distance using the instrument driver. the task consists of the programming of the gpib - rs232 convertor ( the hardware is well developed ), which enables communication between the dso and the controller, the development of the instrument driver and the design of dso control panel

    本課題是科研項目? ? 「帶寬500mhz的數字存儲示波器dso （ digitalstorageoscillograph ）研製」的一部分，任務是完成gpib （ generalpurposeinterfacebus ）儀器驅動器的相關研發，包括在gpib - rs232程式控制轉換器硬體基礎上完成監控程序設計，實現測控機和dso的底層通信;以及在此基礎上設計示波器的儀器驅動器和示波器虛擬面板。
  15. As head of the project, the scheme of a high performance san network : hvia - net based on hvia architecture is proposed the hvia - net is comprised of two components : network interface controller ( nic ) and network route controller ( nrc ) nic is a bridge between pci bus and nrc, and nrc is a 6x6 crossbar three kinds of data transfer modes that used for message passing and system area synchronizations are supported in the hvia - net 3

    Hvia - net由兩部分組成：網路介面控制器nic和網路路由介面器nrc 。 nic是pci總線與網路路由器之間的橋， nrc是一個6 6的交叉開關。 hvia - net支持三種數據傳輸模式，用於實現消息傳遞和系統級同步。
  16. Ql5030, to implement the design of the interface chip. the pci interface controller and programmable logic were integraed in ql5030 chip. on the basis of the profound comprehension of pci protocol, we designed the bus configuration, data transision logicand self - test logic by using the languge such as vhdl. verilog

    Ql5030內集成了pci介面控制器和用戶可編程邏輯fpga 。本設計在深刻理解pci協議的基礎上，在用戶可編程邏輯fpga上，應用硬體描述語言vhdl 、 verilog ，設計了總線配置空間、數據傳輸邏輯和閉環自測試邏輯。
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