bus interface unit 中文意思是什麼

bus interface unit 解釋
匯流排界面單元
  • bus : n （pl busses buses）1 公共馬車；公共汽車；客機。2 〈口語〉汽車，機器腳踏車；飛機。3 【電學】信息...
  • interface : n. 分界面，兩個獨立體系的相交處。vt. （-faced, -facing） 把界面縫合。vi. 交流，交談。
  • unit : n 1 個體，一個，一人。2 （計值、組織、機構）單位；單元；小組，分部；【軍事】部隊；分隊。3 【機械...
  1. Fieldbus is a kind of communication network which is a whole digitial communication multi _ embranchment data bus between intelligential field device and auto _ system. control system based on pcs ( fieldbus control system ) is a new kind of system which connect field control unit, field monitor unit, operation unit, communication interface uint with databus. lt integrates computer technology, communication technology and process cnotrol technology to adjust to demand of high standard productive control and enterprise management. lt developments and follows the advantage of traditional instrument control system and computer central control system and make up for their disadvantage so that it is applied in different industrial cnotrol area

    現場總線是連接智能現場設備和自動化系統的數字式、雙向傳輸、多分支的通信網路。它是一種能支持雙向、多節點、總線式的全數字通信網路。基於現場總線技術的控制系統是一種新型的控制系統，它採用總線方式將現場控制單元、現場監視單元、操作站、通信介面單元連接起來，綜合了計算機技術、通信技術和過程式控制制技術，以適應現代高水平生產控制與企業管理的需要。
  2. On designing for chinese use a biu bus interface unit of a 32 - bit risc

    32位微處理器總線介面部件的設計
  3. There are five parts in powerpc603e ? microprocessor : integer execution unit, floating point unit ( fpu ), instruction ( data ) cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way

    Powerpc603e微處理器系統由定點執行單元、浮點單元、指令（數據） cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令。
  4. It has five parts, such as integer execution unit, floating point unit ( fpu ), instruction cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way. the instruction set and i / o signals are compatible with powerpc

    它由定點執行單元、浮點單元、指令cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令，指令集和介面時序兼容powerpc ，是典型的risc微處理器結構。
  5. The work in this thesis was part of a national 05 " project which task was designing the " longtengrl " microprocessor. there are four parts in " longtengrl " microprocessor : integer execution unit ( ieu ), floating point unit ( fpu ), memory subsystem unit ( msu ) and bus interface unit ( biu )

    本論文完成存儲子系統單元的設計與實現、 「龍騰r1 」系統的集成、存儲子系統單元的驗證以及在「龍騰r1 」存儲子系統基礎上進行了tracecache的研究，其中重點討論存儲子系統的設計與實現。
  6. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  7. This paper sums the situations and trends of domestic and international engineering machinery firstly, discusses the demands and implements of intelligent and long - range monitoring and controlling, and constructs a three - layer model of the engineering machinery long - range monitorin and control system : the front unit control systems, the machine - mounted monitoring system and the long - range control center ; proposes a kind of structure of embedded system based on c / os - ; dissects the characteristics, structure, operation and schedule principle of c / os -, modified the kernel, and improves dependability of the schedule algorithm ; designs the hardware in detail : the microprocessor at91rm9200, the store unit, the serial interface, the human - computer interaction interface, the can bus control module, the debug interface and the reset circuit etc. ; on this basis, succeeds in transplanting c / os - to the system, sets up the operating system framework, designs the driver, sets up the institutional framework of upper user ' s application, provides the method and concrete application process of the graphical user interface module based on c / os -. the system designed in this paper, not only has the functions of local control, friendly human - computer interface, but also has various interfaces which make the system can be managed by the long - rang center

    本文首先綜述了國內外工程機械行業發展的現狀和趨勢，闡明了實施工程機械智能化及遠程監控的意義和需求，並為此構建了工程機械遠程監控系統三層結構模型:前端單元控制系統、車載監控系統和遠程監控中心;提出了一種基於c / os -的嵌入式車載監控系統構建方案;深刻剖析了c / os -的特點、內核結構、運作機理、調度演算法，在此基礎上對其內核進行移植前的必要修改，並對其調度演算法進行了可靠性改進;對構成嵌入式系統硬體的各個主要部分:嵌入式微處理器at91rm9200 、存儲單元、串列介面、人機交互介面、 can總線控制模塊、調試介面以及復位電路等做了詳細的設計;在此基礎上，成功地將c / os -實時內核移植到本文研發的嵌入式硬體系統中，建立了車載監控系統的操作系統體系結構，編寫了該操作系統的底層硬體驅動程序，建立了上層用戶應用程序的組織結構，並給出了圖形用戶界面模塊化應用程序在c / os -操作系統上的建立方法和具體應用過程。
  8. Design the pci bus interface unit by using amcc s5920 chip

    用amccs5920晶元設計pci總線介面單元3
  9. The main contents are as follows : the structure of mixed - signal circuit which newly - defined in ieee1149. 4 std is analyzed in detail, especially anolog boundary module and test bus interface circuit. on the basis of mixed - signal boundary scan technology, a scheme of mixed - signal boundary - scan test system is presented and the hardwares are implemented, including the controller and display unit

    主要研究的內容以及所作的工作如下:詳細分析了ieee1149 . 4標準中針對混合信號電路測試新增的結構，即模擬邊界模塊及測試介面電路。基於混合信號邊界掃描技術標準，提出混合信號邊界掃描控制器的設計方案並實現了其硬體設計，包括邊界掃描控制模塊、顯示驅動模塊等。
  10. Field - bus interface is integrated into the unit so that a distributed life - index area network for large structures is available

    利用現場總線組成壽命監測網路，可實現大型結構的壽命指針網路。
  11. Bus interface unit

    總線介面單元
  12. The first part of this thesis finished the bus interface unit of " longtengrl ". it will become the basis of shared bus

    本論文前期工作完成了「龍騰r1 」的總線介面單元，為後面完成多處理器的共享總線奠定基礎。
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