cascode circuit 中文意思是什麼
cascode circuit
解釋
柵地-
By comparing and analyzing the advantages and disadvantages of three kinds of voltage reference circuits, type of current density ratio compensation 、 weak inversion type and type of poly gate work function, a cascode structure of type of current density ratio compensation is chosen to form the core of voltage reference circuit designed in this paper. applying the negative feedback technology, an output buffer and multiply by - 2 - circuits are designed, which improve the current driving capability
然後通過比較和分析電流密度比補償型、弱反型工作型和多晶硅柵功函數差型三種帶隙電壓基準源電路結構的優缺點，確定了電流密度比補償型共源共柵結構作為本設計核心電路結構，運用負反饋技術設計了基準輸出緩沖電路、輸出電壓倍乘電路，改善了核心電路的帶負載能力和電流驅動能力。 -
On the one hand, the design uses low voltage cascode op framework to improve its gain ; on the other hand, it applies self - bias and cascode structure to the whole sensing circuit. by using the improved method, we have successfully obtained low power consumption, low offset, high linear and high psrr ptat current generator under low power supply
在電路設計上一方面改進運放結構，採用低壓共源共柵結構以提高其增益，另一方面整體傳感電路採用自偏置結構和共源共柵電流鏡結構，在低電源電壓下成功設計了低功耗、低失調、高線性度和高電源電壓抑制比的ptat電流產生電路。 -
Based on the study of circuit cells which are applied in sige bicmos operational amplifier, the telescope cascode configuration is selected to realize high speed and high gain
其次，通過對sigebicmos運算放大器中電路單元的研究，並結合運放實際設計指標，選擇套筒式共源共柵結構作為運放的主體結構以確保高速、高增益的實現。 -
The traditional bandgap reference circuit was improved in the design, which includes the applying of self - bias structure and cascode structure, output of the opamp was used as self - bias voltage, saving bias circuit, and then it was helpful to get low power consumption. through using poly resistance of high value with low temperature coefficient, we reduced the influnce to circuit, if power supply did not change, we must decrease operating current to decrease power consumption, and increasing value of resistor could decrease the operating current efficiently. poly resistance of high value had large value of squared resistor, so we could save layout area
對傳統帶隙基準電路進行了改進設計，採用自偏置結構和鏡像電流鏡結構，利用運放的輸出電壓作為運放的偏置電壓，節省了偏置電路，降低了功耗;使用低溫度系數的多晶硅高值電阻，降低了電阻溫漂對電路的影響;在電源電壓不變的情況下，為了減小功耗就必須減小工作電流，而增大電阻的阻值能有效地減小工作電流，多晶硅高值電阻的方塊電阻很大，可以節省版圖面積。 -
Cascode transistor circuit
串聯晶體管電路
分享友人