clock control 中文意思是什麼

clock control 解釋
時鐘控制
  • clock : n 1 鐘；掛鐘，座鐘，上下班計時計。2 〈俚語〉記秒錶，卡馬表；〈美俚〉〈pl 〉駕駛儀表，速度表，里程...
  • control : n 1 支配，管理，管制，統制，控制；監督。2 抑制（力）；壓制，節制，拘束；【農業】防治。3 檢查；核...
  1. Modern campaign is physiological consider to make clear, the apogee of human body physical strength and nadir suffer airframe " biological clock " control, reach a peak in the dusk commonly

    現代運動生理學研究表明，人體體力的最高點和最低點受機體「生物鐘」的控制，一般在傍晚達到高峰。
  2. The genes that control the body clock are most active in parts of the brain called the suprachiasmatic nuclei

    控制生物鐘的基因在腦部的視交叉上核的細胞內最為活躍。
  3. Using domestic strained integrated resistor as weighing sensor, at89c52 single chip as control unit, combined with arithmetical magnification, analogtodigital conversion ( a / d ), real time clock, liquid crystal display ( lcd ), and series communication interface, a minitype automatic weighing lysimeter is developed. that made measurement of evapotranspiration become conveniently and effectively in studying on water use of crops

    為了方便、有效地測定植物的蒸散，為水分利用研究提供價廉物美、簡單易用的儀器，本研究利用國產的集成電阻應變式稱重傳感器，採用at89c52單片機作為控制單元，結合運算放大、模數轉換、實時時鐘、液晶顯示、數據存儲、串列通信等外圍介面電路，研製了小型自動稱重式蒸散儀。
  4. This paper introduces working principle of tower clock control system in detail from two aspects of hardware and software. some effective anti - disturb measures adopted in design process are explained

    從硬體和軟體兩個方面詳細介紹了塔鐘控制系統的工作原理，並闡述了設計中所採取的一些有效的抗干擾措施
  5. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  6. In this paper, a clock recovery system that based on phase control technology is studied

    本文設計的鎖相環路是基於相位控制技術的時鐘恢復系統。
  7. Secondly, compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory, a novel topology of cmos preamplifier latch comparator circuit is presented. considering trade - off between kickback noise and power dissipation, reference resistance value is optimized. according to the encode demands of different stage resolution, clock - control encode circuit is designed

    其後，在具體的子adc設計中，對比各比較器類型的優缺點，並基於預放大鎖存快速比較理論，提出一種新型高速低功耗預放大鎖存比較器電路拓撲;根據adc系統所允許的參考電壓最大波動限制，在回饋噪聲對輸入參考電平的影響和功耗之間折衷，確定優化的參考電阻串阻值;根據不同級精度的編碼要求，設計出時鐘控制編碼電路。
  8. Round - the - clock harbour control section round - the - clock western immigration anchorage

    全日二十四小時（港口管制組）
  9. Control multi device with database clock setting mc672a

    設定控制板mc672a時鐘
  10. Realization of digital clock control system by complex programmable logic device

    實現的數字鐘控系統
  11. Based on the research and analysis of system structure of 10 - bit 100msps pipelined cmos adc, according to the system performance, the specifications of sub _ adc is obtained, while the sub _ adc including the preamplifier - latch comparator, the reference ladder resistance and the clock - control encode circuits are discussed in detail

    基於對10 - bit100mspspipelinedcmosadc系統結構的分析研究，結合系統性能確定了子adc的指標要求，詳細討論並設計了子adc單元模塊的設計，包括預放大鎖存比較器，參考電阻串和時鐘控制編碼電路。
  12. This is a clock control which is able to roll the digit away as the time elapses, just like what the oil meter does in the old car

    這個時鐘控制項可以直接調整經過的時間，就像在老式車中的油表器一樣。
  13. Clock control signal

    時鐘控制信號
  14. Special chinese characters base designed is used to double - quick chinese of english interface. interruption and clock control process analysis of chromatograph periodically, current process status is monitored continually and alarmed

    由於測控系統是在dos環境下開發，給人機界面的設計帶來了較大的困難，自製專用漢字庫實現英文界面的快速漢化。
  15. The clock control da chip of mb40978 converts rgb digital vedio singal into amplitude - modulated rgb pulse that is magnified and inner - modulate laser

    經過處理的rgb視頻數字信號經過時鐘控制的da轉換和一級驅動，產生調幅脈沖信號，實現半導體激光器的內調制。
  16. Software design includes many aspects, such as design of interface, interrupt and clock control, monitoring, etc. sampling and accessing quickly data of chromatogram peak is an important tache to ensure analytic and real time performance of chromatograph, fifo make high - speed input and output of a / d sampling data possible, and expended memory, instead of disk, save a great deal of peak data and process parameter

    硬體系統由cpu 、 a / d 、 d / a 、顯示驅動、實時鐘五個模塊組成，軟體設計包括譜峰數據的高速採集和存取、人機界面的設計、中斷和實時鐘控制、監測控制等方面的工作。譜峰數據的高速採集和快速存取是保證工業色譜儀分析性能和實時性的重要環節，採用了fifo存儲器技術實現a / d采樣數據的高速輸入輸出，使用擴展內存代替硬盤存貯過程參數和海量的譜峰數據。
  17. Your alarm clock control is almost complete

    警報時鐘控制項已經基本完成。
  18. Your clock control now encapsulates a

    現在， clock控制項封裝了
  19. For this demo, timers are shared by multiple instances of an extremely simple clock control

    其中，一個非常簡單的時鐘控制項的多個實例共享定時器。
  20. An example of a custom control is a clock control that duplicates the appearance and behavior of an analog clock

    時鐘控制項即是一個自定義控制項，它復制模擬時鐘的外觀和行為。
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