epitaxial layer 中文意思是什麼

epitaxial layer 解釋
取向附生層
  • epitaxial : 晶膜
  • layer : n 1 放置者,鋪設者,計劃者。2 【賽馬】(一般)賭客。3 產卵的雞。4 【軍事】瞄準手。5 層;階層;地...
  1. A thin epitaxial layer ( 10gm ) ldmos device used n - burry layer structure was proposed in the paper during the high - voltage device design, which is helpful to improve the drive circu it ? technology

    在高壓器件研究中,提出了一種外延層厚度為10 m採用n埋層結構薄外延高壓ldmos器件,對進一步改進驅動電路的工藝有著積極的意義。
  2. Considering the shortcoming of thick epitaxial layer technology, author proposed a thin epitaxial layer ldmos used n - burry layer. through optimizing the n - burry layer ? length and impurity dose will increase the device ? breakdown voltage

    針對目前厚外延工藝的缺點,提出的薄外延ldmos採用n埋層,通過優化n埋層長度、注入劑量可提高器件耐壓。
  3. The effect of the traps in the epitaxial layer is analyzed using the medici simulator and shockley - read ? hall model, which indicates the ppc is independent of the traps in the epitaxial layer

    利用medici模擬軟體和shockley - read - hall模型研究了體內陷阱對ppc效應的影響,結果表明體內陷阱與ppc效應無關系。
  4. During the high - voltage device design, the thick epitaxial layer ldmos which is compatible with current technology was researched. this device used piecewise vld and multiple region structure f reduce field layer. the using of the f reduce field layer effectively reduce the surface electric field of the device, shorten the length of its drift region, enlarge the choice of range of the ion implant dose of the p layer, and effectively restrain the disadvantageously affection on the breakdown voltage of the interface charge qss

    在高壓器件研究中對與現有工藝相兼容厚外延ldmos進行研究,該結構採用分段變摻雜多區p ~ -降場層,有效降低器件的表面電場,縮短器件的漂移區長度,增大p ~ -降場層注入劑量的選擇范圍,並有效地抑制界面電荷qss對器件耐壓的不利影響。
  5. Testing of semi - conductive inorganic materials ; measuring the thickness of silicon epitaxial layer thickness by infrared interference method

    半導體無機材料的試驗.用紅外線干涉法測量硅外延生長
  6. This indicated an absence of deep trapping centers. this peak was still observed at room temperature, temperature. the presence of this intrinsic near - band - gap emission line in the pl spectrum even at room temperature is a further indication for the high quality of the epitaxial layer

    Znse薄膜樣品在77k時,光致發光譜中只觀測到了近帶邊的發射,而且這一發光一直持續到室溫,說明在si襯底上lp - mocvd外延生長的znse薄膜具有較高的質量。
  7. Up to present we have prepared the epitaxial simox substrate ( i layer 0. 37um, silicon layer 2. 8um ), and done the circuit design, process integration, device simulation and some layout design )

    本項目目前已完成了simox外延襯底的制備( i層0 . 37um ,外延硅層2 . 8um ) ,以及功率開關集成電路的電路設計,工藝設計和部分版圖設計。
  8. Gallium arsenide epitaxial layer - determination of carrier concentration - voltage - capacitance method

    砷化鎵外延層載流子濃度電容-電壓測量方法
  9. The two structure ldmos was compared by simulation with medici software. the result is that their breakdown voltage is almost the same and the thin epitaxial layer ldmos ? ron is lower

    通過medici模擬對兩種器件進行比較,結果為兩種器件耐壓相當,薄外延ldmos導通電阻略低。
  10. After optimizing the epitaixal condition, low temperature bonding, splitting and removing of porous silicon, soi material has been successfully fabricated for the first time in china with the epitaxial layer transfer of porous silicon ( eltran ) the eltran - soi has been characterized and the results indicate that the top si layer is perfect single crystal, and its thickness is uniform

    優化了外延條件,結合低溫鍵合與多孔硅的剝離技術,在國內首次用多孔硅外延層轉移技術成功地制備出了soi材料。分析表明, eltran - soi的頂層硅厚度均勻,單晶質量優良;界面清晰、陡直;電學特性優異。
  11. Ohmic contacts on h2 - thermally - treated 6h - sic surface by evaporating aluminum without annealing have contact resistances of 8 10 - 3 - cm2 on room temperature and keep fairly good thermal stability under the temperature of 400. its ohmic properties do n ' t depend on the doping concentrations of the substrate, which enables us to form ohmic contacts on low dropped substrate especially on epitaxial layer

    通過氫氣處理6h - sic表面並鍍鋁后直接形成的歐姆接觸室溫比電阻率達到8 10 ~ ( - 3 ) ? cm ~ 2 ,溫度不超過400時該接觸具有較好的穩定性,其歐姆特性不依賴于襯底的摻雜濃度,是一種適宜在低摻雜襯底特別是sic外延片上制備歐姆接觸的有效方法。
  12. According to the requirement of innovation engineering in chinese academy of sciences, the work in this thesis focused on fabrication of soi material with epitaxial layer transfer of porous silicon and study of luminescence of modified porous silicon, and we obtained the following new results : the effect of doping and anodizing condition on the properties of porous silicon, including the microstructure, ciystallinity and surface morphology, has been studied systematically. it is found that the porous silicon and substrate have the same orientation and share a coherent boundary. but at the edge of pores, the lattice relaxes, which induces xrd peak moving of porous silicon

    Soi技術和多孔硅納米發光技術研究是當今微電子與光電子研究領域的前沿課題,本文根據科學院創新工程研究工作的需要,開展了多孔硅外延層轉移eltran - soi新材料制備與改性多孔硅發光性能的研究,獲得的主要結果如下:系統研究了矽片摻雜濃度、摻雜類型和陽極氧化條件等因素對多孔硅結構、單晶性能和表面狀態的影響,發現多孔硅與襯底並不是嚴格的四方畸變,在多孔硅/硅襯底的界面上,多孔硅的晶格與襯底完全一致,但在孔的邊緣,多孔硅的晶格發生弛豫。
  13. In this paper, the growth technology is presented for epitaxial silicon carbide films on sapphire with a buffer layer by atmospheric - pressure chemical vapor deposition ( apcvd ) process. the effect of temperature and precursors flow rates on the growth of silicon carbide films by chemical vapor deposition is analyzed. the structural properties of the films grown on sapphire compound substrate are studied by x - ray diffraction ( xrd ), x - ray photospectroscopy ( xps ) and photoluminescence spectroscopy

    本論文提出了在藍寶石上引入一層緩沖層材料形成復合襯底,採用常壓化學氣相淀積( apcvd )方法在其上異質外延生長sic薄膜的技術,分析了cvd法生長sic的物理化學過程,通過實驗提出sic薄膜生長的工藝條件,並通過x射線衍射( xrd ) 、 x射線光電子能譜( xps ) 、光致發光譜( pl譜)和掃描電鏡( sem )對外延薄膜的結構性質進行分析。
  14. Many factors which affect the epitaxy qualities, especially the porosity of porous silicon and growth temperature, have been studied in detail. it is found that the pre - oxidation of porous silicon can efficiently prevent the boron diffusion during epitaxy. the defaults along { 111 } are the main defects in epitaxial silicon layer

    深入研究了影響外延的各種因素,特別是多孔硅的孔隙率和外延溫度對外延層質量的影響,發現多孔硅的預氧化可以有效地阻止外延時b的擴散,外延層中主要的缺陷是沿著{ 111 }面生長的層錯。
  15. The epitaxial layer quality of gaalinp has been specified so well by double - crystal x - ray diffraction that there are many and strong interference in the picture

    在摻雜上成功消除mg的記憶效應,使得器件各外延層雜質濃度達到設計的摻雜水平。
分享友人