field-programmable logic array 中文意思是什麼

field-programmable logic array 解釋
場程序邏輯陣列
  • field : n 菲爾德〈姓氏〉。n 1 原野，曠野；（海、空、冰雪等的）茫茫一片。2 田地，牧場；割草場；〈pl 〉〈集...
  • logic : n. 1. 邏輯，理論學。2. 推理[方法]；邏輯性，條理性。3. 威力，壓力，強制（力）。
  • array : vt 1 打扮，裝飾。2 使…列隊，排列。3 提出（陪審官）名單，使（陪審官）列席，召集（陪審官）。n 1 整...
  1. With the quickly development of field programmable gate array, fpga with more than million logic gates has been used

    隨著fpga （現場可編程門陣列）技術的快速發展，萬門以上乃至幾十萬門邏輯陣列的使用越來越普遍。
  2. To realize the real - time tracking image target, we use the cpld ( c ' omplex programmable logic device ) to control the system logic and use ipga ( field programmable gate array ) to preprocessing the image

    為了滿足系統的實時性要求，運用大規模可編程邏輯陣列cpld進行邏輯控制和現場可編程門陣列fpga對採集的視頻圖像做預處理。
  3. Fpga ( field programmable gate array ) is a kind of programmable logic device

    Fpga屬於一種可編程邏輯器件，晶元內部以陣列狀排列各種可配置邏輯塊。
  4. The system used hight - performance dsp ( tms320c6202 ) to realize the real - time image object tracking algorithm, used large - scaled programmable logical array cpld to control logic and field programmable gate array fpga to preprocessing the image

    其中運用了高性能dsp （ tms320c6202 ）完成實時圖像目標處理演算法，並結合大規模可編程邏輯陣列cpld進行邏輯控制和現場可編程門陣列fpga對採集的視頻圖像做預處理，滿足了系統的實時性。
  5. Combined with listless spiht ( set partition in hierarchical trees ), a remote sensing image compression hardware system using fpga ( field programmable logic array ) technology is implemented on virtex chip

    在使用fpga技術的基礎上，一種結合無鏈表spiht的遙感圖像壓縮演算法在可編程器件virtex晶元上得到了實現。
  6. Pipelining and parallel technology, accompanying with fast fifo as cache memory, instead of direct program operation, are adopted in the scheme and increase the transmitting speed dramatically ; fpga ( field programmable gate array ) is applied to realize the complex control logic of the system and makes it integrative, flexible and fast ; 386ex based embedded system, along with vxworks real - time operating system is introduced to substitute the microcontroller based system to simplify the hardware design and enhance the overall performance of ssr, and will make the system more easier to be applied to the projects in the future

    該設計方案採用了流水線和并行技術，配以快速fifo緩存的方式取代了直接對flash進行編程的方式，極大地提高了閃存晶元存儲數據的速率；採用fpga技術實現系統的主要控制邏輯，集成度高、靈活性好、速度快；採用基於386ex的嵌入式系統及基於vxworks的嵌入式實時操作系統，取代單片機系統及其編程，提高了系統的整體性能，減輕了硬體設計的負擔，且使系統研發的延續性好。
  7. Finally, on the basis of the mpeg - 1 layer hencoding hardware structure, the block of logic communicates with the pc over the parallel port and the interface for flash memory are design. then a mpeg audio coding system, which applies to store audio signal, is presented through the field programmable gate array device technology

    最後，在mpeg - 1層編碼的硬體結構的基礎上，結合計算機並口通信和flash存儲器的介面模塊，採用現場可編程邏輯器件fpga技術，最終設計了一種應用於音頻信號存儲的mpeg音頻編碼系統。
分享友人
分享到 Line

分享到臉書