interlevel dielectric 中文意思是什麼
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For vlsi, a plane surface may be approximated by depositing the interlevel dielectric by bias-sputter deposition (see section 9. 2. 4) or by using planarization.
對于超大規模集成電路的平面狀表面，可以用偏置濺射淀積法的層間介質淀積（見924節）或用平面化工藝來近似獲得。 -
For vlsi, a plane surface may be approximated by depositing the interlevel dielectric by bias - sputter deposition ( see section 9. 2. 4 ) or by using planarization
對于超大規模集成電路的平面狀表面，可以用偏置濺射淀積法的層間介質淀積（見9 2 4節）或用平面化工藝來近似獲得。
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