speed accuracy trade off 中文意思是什麼
speed accuracy trade off
解釋
速度-
Then, a new adaptive, on - line, fast samplingstrategy - multi - scaling sampling - is presented inspired by mra multi - resolution analysis and shannon sampling theorem, for quicklyobtaining acceptably approximate association rules at appropriate samplesize. both theoretical analysis and empirical study have showed that thesampling strategy can achieve a very good speed - accuracy trade - off
但是,取樣策略必須在演算法的效率和結果的精確性之間進行很好的折中, 「如何確定合適的樣本大小使得運行於其上的關聯規則挖掘滿足精確性的要求取樣復雜性」成為這一方法的關鍵難解問題。 -
Under 0. 35um si - cmos process, considering the trade off of accuracy and speed in the adc, 2. 5 - bit were converted in the first stage of the pipeline. using the improved calibration scheme and full difference structure and bottom - plant sampling technique to reduce the errors of the 10 - bit ( 2. 5 + 1. 5 5 + 3 ), 100msample / s pipeline adc
在0 . 35 m工藝水平下,通過折衷考慮提高系統線性度和降低功耗的要求,將流水線第一級精度取為2 . 5位,採用改進的冗餘位演算法,並結合全差分結構,下底板采樣等技術對一個( 2 . 5 + 1 . 5 5 + 3 )結構的10位100msample / s流水線adc系統進行校正。
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