振蕩指標 的英文怎麼說

中文拼音 [zhèndàngzhǐbiāo]
振蕩指標 英文
oscillatior
  • 振 : 動詞1. （搖動; 揮動） shake; flap; wield 2. （奮起） brace up; rise with force and spirit
  • 蕩 : Ⅰ動詞1 （搖動; 擺動） swing; sway; wave 2 （無事走來走去; 閑逛） loaf; wander; roam; loiter; go a...
  • 指 : 指構詞成分。
  • 標 : Ⅰ名詞1 [書面語] （樹梢） treetop; the tip of a tree2 （枝節或表面） symptom; outside appearance; ...
  • 指標 : target; quota; norm; index; merit; subscript; index arm; indicatrix
  1. The paper analyzed the relationship of the scale factors and several main performance indexes of the system ' s respond curve like over - regulation, divergence, surge - degree, steady - state error and transient time, and denoted these indexes by some fuzzy membership functions

    溫室溫度響應的主要動態性能指標包括：超調量、系統發散程度、系統振蕩程度、穩態誤差、過渡過程時間等。
  2. The concept of " timing " in the article is not the clock in our ordinary living, but syntheses which is made up of some frequency source in the signal generator ( such as cs atom frequency standard, rb clock & high accuracy quartz crystal oscillator ) which produces the primary frequency, the matching input interface and the matching output interface and controlling circuit etc. for example, bits is a kind of timing equipment, which is used to control the timing of some functions

    本文論及的「時鐘」概念不是指日常生活中使用的鐘表，而是由產生基準頻率的信號發生器（如銫原子頻率標準、銣鐘及高精度石英晶體振蕩器等）中的某種頻率源以及相配套的輸入、輸出介面和控制電路等組成的一整套具有特定同步定時功能的綜合體。如bits就是一種時鐘設備，它提供用在通信系統中控制某些功能的定時的時間基準設備，時鐘提供的信號稱為基準信號、定時信號或同步信號。
  3. To avoid high frequency oscillation in the course of autopilot design, damping coefficient value was treated as a constraint, the rise time was taken as objective, and the other performance criteria were taken as constraints, then the robustness design problem was solved by multi - objective optimization method

    摘要在導彈控制系統設計過程中，考慮了自動駕駛儀的高頻振蕩問題，將其轉化為系統的一個約束條件，同時把上升時間轉化為目標函數，其他設計指標視為約束條件，採用有約束多目標優化的方法解決了系統魯棒性設計問題。
  4. With consideration of parameters trade - offs involved in the circuits, the vco ’ s topology is designed

    考慮壓控振蕩器設計指標的相互約束條件，盡可能減小相位噪聲的來源，設計電路的拓撲結構。
  5. In the meantime, the all sub - circuits are also designed and emulated carefully including inverter, rs type flip - flop, voltage reference circuit, error amplifier, voltage comparator, sawtooth - wave generator, pwm comparator, soft activation circuit and so on. as a result, all of the sub - circuits answer the requirements. this chip has taped out with the 0. 5um mix - signal process of csmc

    本文利用cadenceeda集成電路設計工具、 spectres模擬工具，對集成電路內的各個模塊包括反相器、基本rs觸發器、基準電壓電路、誤差放大電路、電壓比較電路、鋸齒波振蕩發生電路、 pwm比較電路、軟啟動電路、驅動電路等進行了具體的設計和模擬，且達到了預先設定的指標。
  6. For the amplitude - frequency response at the self - oscillation frequency is one, a method to calculate the dynamic accuracy and the index of the servo system is provided, by comparing them, the scheme to design the verifying unit is presented

    利用伺服系統在自振蕩頻率點的幅頻特性為1這一特點，將輸入信號頻率、幅值、系統的自振蕩狀態和系統的參數聯系起來，構建了伺服系統動態精度的計算公式和指標估算經驗公式，並根據兩者的關系提出動態精度校正方案。
  7. And then, based on the above theories, the circuit design and simulation means have been concretely applied in the internal modules of voltage reference, bias circuit, oscillator, error amplifier and drive circuit of the chip and so on. the relevant design indexes are successfully achieved. at last, the whole circuit simulation and layout design are completed

    在此理論基礎上對該電源晶元內部的各個模塊，如電壓基準源、偏置電路、振蕩器、誤差放大電路和驅動電路等模塊進行了具體的電路設計和分析模擬，且達到了相應地設計指標，最後，完成了整體電路模擬和版圖設計。
  8. Subcircuit models are designed and simulated, which includes bias current source, voltage reference, error amplifier, pwm comparator, driver circuit, protection circuits for over - temperature, over - current. at last, combined with periphery component, the circuit is simulated, and the result meets the anticipant requirement

    並對集成電路內的各個模塊包括電流偏置電路、基準電壓電路、誤差放大電路、三角波振蕩發生電路、 pwm比較電路、驅動電路、過熱保護電路和過流保護等進行了具體的設計和模擬，並對整體應用電路進行了模擬，結果均達到了預先設定的指標。
  9. In this dissertation, the method to design and realize the digital receiver in the field programmable gate array ( fpga ) has been discussed ; combining coordinate rotation digital compute ( cordic ) to design nco, we get a efficient structure without multiplications

    本論文正是運用現場可編成邏輯器件（ fpga ）設計與實現數字接收機問題開展研究，結合坐標旋轉數值計算（ cordic ）演算法實現數控振蕩器（ nco ） ，得到一種免乘法器高效可移植性好的數字接收機fpga實現結構，並在現有的硬體平臺上進行了接收機系統的調試，測試結果表明該接收機能夠達到系統指標要求。
  10. First, an analysis for the design of the impulse phase lock oscillate, which includes impulse phase detector the dielectric resonant oscillate etc. secondly, presents an analysis for the design of wide band balanced low noise amplifier. the last two part simplify the theory and the electrical characteristics of the sub harmonic mixer, and the mmvco

    第一部分著重介紹了脈沖鎖相源的工作原理（主要包括取樣鑒相器和介質穩頻的壓控振蕩器） ，並介紹了研製結果的性能指標;第二部分介紹了平衡式寬帶低噪聲放大器的基本理論
  11. In the course of the low phase noise research, by integrating many aspects, using recent accomplishments, i come up with my method and theory, that by comprehending and controlling subcircuit of oscillator ' s resonator, can let us know exactly their working states. using this method and theory, combining the vco circuit of this subject, i deduce and demonstrate particularly the reason of low frequency oscillation, and come up with the measure of avoiding it. this makes design and producing vcos can avoid the disturbing of low frequency oscillation, and improve the features of vcos. at later process of debugging vco, using this method makes the vco achieves very good working state

    在低相噪研究中，綜合了各方面的情況，運用了當今低相噪vco的研究成果，並提出了自己的對諧振電路結構進行總體把握，從而準確得知電路的工作狀態的思想和理論。運用此方法，在論文中結合本vco電路拓撲結構，詳細推導和論證了低頻振蕩產生的原因，並提出了避免發生低頻振蕩的措施。使低相噪vco的設計及調試能免於低頻振蕩的干擾，從而有利於提高vco的各項指標。
  12. It admits of no delay to develop high stability crystal oscillator and enhance its phase noise index to reduce the effect of jitter to the performance of the whole system

    研製高穩定晶體振蕩器，提高相位噪聲指標、減少抖動對整體性能的影響，已經成為刻不容緩的任務。
  13. It is sticking point for optimizing the performance of pll to confirm the parameter of vco ( voltage controlled oscillator ) and properly design the loop filter

    確定壓控振蕩器的各項指標、合理設計環路濾波器是優化環路性能的關鍵，本文對此作了比較詳細的分析。
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