數位采樣 的英文怎麼說

中文拼音 [shǔwèicǎiyàng]
數位采樣 英文
digital sampling
  • : 數副詞(屢次) frequently; repeatedly
  • : Ⅰ名詞1 (所在或所佔的地方) place; location 2 (職位; 地位) position; post; status 3 (特指皇帝...
  • : 采名詞(采地) feudal estate
  • : Ⅰ名詞1. (形狀) appearance; shape 2. (樣品) sample; model; pattern Ⅱ量詞(表示事物的種類) kind; type
  • 數位 : numerical digit; digit; place; digit position
  1. Seven plots selected from wanglang reserve were distributed in different types of forest and at different altitude, and different plot has different microclimate. soil property, microbial population, soil nutrient content of forest soil were determined in wanglang natural reserve, from may to october 2002 to july 2003, the ecological distribution of three main groups, bacteria, actinomycete and fungi were determined in the forest soils by the cell enumeration methods. six kinds of physiological groups, including ammoniation bacteria, nitrification bacteria, nitrosification bacteria, aerobic autogenesis azotobacter, aerobic cellulose - decomposing bacteria and anaerobic cellulose - decomposing bacteria were enumerated by the most - probable number ( mpn )

    2001年10月在王朗自然保護區內設立了3個定研究地和4個臨時地,通過多次現場與室內實驗分析,測定了白樺林、岷江冷杉林、紫果雲杉林、繡線菊-羊茅群落、羊茅群落及高山柳灌木叢等6種不同植物群落內土壤微生物三大類群量、功能微生物量、土壤養分,並在固定地內使用埋袋法進行了三個埋藏深度的凋落物分解袋試驗,初步研究了枝條、闊葉、針葉等凋落物組分在不同分解階段所含養分的動態變化。
  2. This study is a post - cruise study of this leg, calcareous nannofossil samples from sites 1146, 1147 and 1148 of leg 184 were analyzed to provide a high - resolution biostratigraphy for this leg and to investigate morphological variation of coccolith genus gephyrocapsa. the main results of this study are : 1. 12 late pliocene to pleistocene bio - events were recognized and 6 zones of martini ( 1971 ) were determined for the upper sediment sequences of sites 1146 and 1148

    本文作為大洋鉆探項目船下后續研究的一部分,對184航次中的1146站和1147 、 1148站品進行了分析和研究,在船上科學家已經建立起的地層框架的基礎上進一步加密,對生物事件標志化石類別進行量統計,進一步確定了12個生物事件在鉆孔中的深度,建立起了兩個站的高解析度的鈣質超微化石生物地層框架。
  3. In digital relay, the percentage of noise will increase rapidly with the increase of sampling rate when derivation calculus is substituted by sampled difference term. to solve this problem, a new method using fragment function integrated with the least square algorithm is proposed in this paper. the influence of white noise is greatly reduced and the accuracy of the dead angle calculation is nicely improved after adopting the new method

    字式保護中,如果用差分代替求導將導致噪聲的百分比誤差隨著頻率的提高而劇增,本文對此進行了分析並提出了用分段條函最小二乘法來計算電流波形的導值,以便在提高率的同時降低噪聲誤差的影響,並將其應用於基於32浮點dsp的新型變壓器保護裝置。
  4. Based on fractional sampling method, a new super - exponential iteration decision feedback blind equalization algorithm for severely nonlinear phase distortion channels was proposed

    因此針對嚴重頻率衰落和非線性相失真通道,提出了一種分的混合盲均衡演算法,並獲得了較快的收斂速度和較小的剩餘均方誤差。
  5. The architecture and design methods of - modulators are studied. based on it, the bits of quantizer, oversampling - ratio and the orders of modulator have been designed

    對調制器的結構和設計技術進行了研究,根據系統要求設計了量化器,調制器過比和階
  6. 2. based on the collection and analysis of the experimental results, the software system has been improved and an 8 - byte sampling card is applied to testify the feasibility of the designed system

    在對實驗據的採集和分析的基礎上改進系統軟體的功能,使用8卡驗證了系統設計的可行性。
  7. Finally, approach to improve the performance of the system is put forwards based on the analysis of the experimental results. the following work has been done in this paper : l. have put forward an integrated distributed fbg sensoring demodulation system and have settled the whole set of equipments and experimental devices of the system. software corresponding to a 8 - byte and a 16 - byte sampling card have been developed respectively

    在前人研究的基礎上,設計了一整套分散式fbg傳感解調系統,搭建了整個分散式fbg解調系統的實驗裝置系統,分別設計了使用8和16卡進行據接受和處理的軟體系統,並對得到的據進行分析和處理。
  8. It designed signal amplifying circuit, frequency tricking circuit, data sampling and keeping circuit. the choice of 12 bits high accuracy a / d integrated data sampling card made program simply, high flexible and expandable. and to each error which is likely to occur in high voltage capacity type equipment during the monitoring, analysis and judgement are given

    在硬體電路實現上,注意選擇信號傳感器;合理設計了信號放大電路和濾波電路;設計了頻率跟蹤電路,/保持電路;結合軟體控制選用了12高精度的a / d轉換器,使軟體編程簡化且具有較高的靈和性和可擴展性。
  9. The analog signals are regulated to satisfy the system and analog - to - digital converter ( adc ) ; dsp is the core part and is connected with adcs, a controller of ethernet, a rs - 485 bus transceiver, a can bus transceiver and a clock. the real - time data is disposed by dsp and is transferred to the upper computer when the alarm is happened

    模擬信號調理模塊對輸入的信號進行調理,以達到系統和模轉換器( adc )的要求; dsp作為系統的核心部件,外擴了adc 、以太網控制器、 rs - 485總線收發器、 can總線收發器和時鐘晶元, dsp對實時據進行處理,當報警發生時將實時據通過以太網上傳給上機。
  10. A data acquisition system with the following features is realized : ? transmission rate up to 100kbyte / s over usb ; ? system ' s dynamic range as high as 120 db ; ? multi - kind of trigger mode control ; ? sampling rate as high as 100 ksps ; ? 12 - bit a / d conversion accuracy ; ? 32k bytes on - board data memory ; ? the system, which was made up of large - scale electronic chips, is small, light and portable, and suitable for field use

    本設計最終實現了一個瞬態信號據採集系統,它具有以下特點: ?採用usb介面進行高速據傳輸,傳輸速度達100kbyte / s ; ?採用浮點a / d轉換技術,動態范圍達120db ; ?多種觸發控制方式; ?最高率100ksps ; ? 12精度: ? 32kb據緩存; ?使用新型大規模電子器件,系統結構緊湊,重量輕,適合野外作業。
  11. Supported by heilongjiang province natural science foundation projects " research on the errors mechanism of time division a. c. power measurement " ( no. e9719 ), " research on theory of analog digital mixed sampling power energy measurement " ( no. e01 - 15 ) and foundation for university key teacher by the ministry of education " the research on the low audio frequency a. c. power measurement smart instrument " ( no. 1087 ), in this dissertation it is made that a systematic and deep study on power measurement model errors and instrument errors about analog sampling, digital sampling and mixed sampling measurement, and fully experiments about mixed sampling measurement

    本學論文在黑龍江省自然科學基金資助項目「時分割交流功率測量原理誤差產生機理的理論研究」 (編號: e9719 ) , 「模擬字混合採功率與電能測量的理論研究」 (編號: e01 - 15 )和教育部高等學校骨幹教師資助計劃項目「中頻電功率測量智能儀器的研製」 (編號: 1087 )的資助下,以電功率模擬測量、測量和混合採測量方法為對象,對電功率測量的原理誤差和儀器誤差進行了系統和深入的理論研究和有關的實驗研究。
  12. For super - speed data sampling rate, design the dma bus of telecommunication method. aiming at the hardware system oneself request of security and stabilization, design the reset module, the power monitoring module, the serial eeprom module

    為了保證具有高速的率,設計了dma總線的通訊方式。針對硬體系統自身安全性和穩定的要求,設計了復模塊、電源監控模塊、串列eeprom模塊。
  13. In addition, in order to make the acquisition of wave data, image processing method and the threshold approach are given to resolve data sampling and detect r wave

    另外,在心電信號過程中採用了圖像處理的方法,實現了一定頻率的;並且利用閾值法對r波進行準確定,從而保證了波形據的準確性和可靠性。
  14. The main tasks of this thesis are as follows : ( 1 ) a two - terminal fault location arithmetic based on the synchronization sampling of gps has been brought up. ( 2 ) because of the cost of gps and the truth that there is phase difference of two - terminal, the two - terminal fault location arithmetic is faced up with facts that how to keep the sampling data of two - terminal synchronous. according to that, two new methods are proposed, which do n ' t need the synchronized sampling data of two - terminal

    全文主要工作如下: ( 1 )利用全球定系統gps的授時功能,提出了基於gps同步的雙端故障測距演算法; ( 2 )由於增加gps硬體設施,造價比較高,且客觀上雙端據存在著不同步相差,雙端故障測距法所面臨的主要問題是兩端的同步問題,針對這一問題,本文又提出了兩種不需要兩端同步的工頻故障測距新方法,基於powell方向加速法和基於遺傳演算法的故障定演算法。
  15. It suits in 220 500kv voltage rank ’ s electrical power system breakdown recording. uses 32 - bit embedded microprocessor arm and the high speed dsp multi - tasking ; designs the fpga hardware data sampling controller to produce the control signals, and guarantee sampling precision ; may record 36 groups analog signals and 80 groups switches signals ; uses distributed and modular design distributionally, may dispersely install in the screen cabinet, also may be linked to a management computer or transfer data to the far control center through the 10m / 100m ethernet

    它適合於220 500kv電壓等級的電力系統故障錄波。採用32嵌入式微處理器arm與高速dsp并行工作;設計了fpga硬體控制器產生控制信號,保證精度;可以記錄36路模擬量和80路開關量;採用分散式、模塊化設計,可以分散安裝在屏櫃中,也可以通過10m / 100m以太網級連到一臺所級計算機或遠傳到調度中心。
  16. In the design of the circuit of hardware, the paper choose the suitable signal sensor, rationally designing the signal enlarging circuit by programme - controlled and signal filter circuit designing the sampling at datas / retaining circuit and hardware communications based on rs - 485 network. combining with software - controlled it select the integrated gathering - card of a / d datas of the high accuracy for the 12th precision, which simplify software programmings and have higher flexibility and can extensible

    在硬體電路的實現上,選擇了合適的信號傳感器:合理設計了信號程式控制放大電路和濾波電路;保持電路和現場基於rs - 485網路結構的硬體通信系統;結合軟體控制選用了12高精度的a d集成據採集卡,使軟體編程簡化且具有較高的靈活性和可擴展性。
  17. Taking the industrial computer as the kernel, the system structure was simplified by extending the multi - channel in one piece of cpld, the servo - control precision and working stability were improved effectively by the full digital sample of the signal for speed circuit and position circuit. and the advantages of the system are simple 、 low ? cost and stable

    以工控機為核心,在置反饋信號採集調理過程中對單片cpld進行多通道擴展以簡化系統結構,並通過對速度迴路和置迴路的信號的全,有效的提高了伺服控制精度及工作穩定性,使系統具有結構簡單、成本低廉、性能可靠等特點。
  18. In this paper, we describe the research and realization of the high - speed data acquisition system applied in initial velocity radar. the sampling rate can reach 40msps, and the resolution is 12 bits. the acquisition speed that the system provides can be altered

    本文介紹了基於初速雷達的高速據採集系統的研製和實現方法,該系統提供了最高40mhz的速率、 12精度的據採集通道,且頻率可調。
  19. The important study is the electric parameter measurement system which is achieved with sigma - delta a / d converter and dsp " sampling to three phrase voltage and current. its function includes the measurement of current, voltage, frequency, phrase, power, factor, active power and energy, reactive power and energy

    本文主要研究了用? a d轉換器和dsp處理器對工頻三相電壓、電流進行,再用字低通濾波器實現對三相電參進行測量的測量系統。其主要功能包括對電流、電壓、頻率、相、功率因、有功功率、有功電能、無功功率、無功電能等測量,並具有測量據并行輸出介面。
  20. The main contents are as follows : firstly, two typical architectures of ultrahigh speed adc are presented. moreover, the block diagram design of a 6 - bit 1gsample / s ( gsps ) adc is described. in the meantime, the building blocks and key ideas to improve the sampling rate are also described

    首先,基於兩種典型的超高速a / d轉換器的特點,提出了一個解析度為6速度可達到1gsps的模轉換器系統結構,並對構成系統的各電路模塊及提高速度的關鍵技術進行了研究。
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