硬體介面層 的英文怎麼說

中文拼音 [yìngtǐjièmiàncéng]
硬體介面層 英文
hardware interface layer
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 體 : 體構詞成分。
  • 面 : Ⅰ名詞1 （頭的前部; 臉） face 2 （物體的表面） surface; top 3 （外露的一層或正面） outside; the ri...
  • 層 : i 量詞1 （用於重疊、積累的東西 如樓層、階層、地層） storey; tier; stratum 2 （用於可以分項分步的...
  • 硬體 : hardware
  • 介面 : joggle; nozzle; mouthpiece; [計算機] interface
  1. Aiming at the function and performance limitations of traditional special cnc or current pc - based open - structure cnc, a brand - new cnc platform designing scheme of multi - layer open - architecture is presented, based on embedded - mcu calculation and management core, and three kinds of expanding mode of software, hardware and interface. by using double system working ram and boot rom technology, an independent re - development interface is set on the hardware platform to realize customized function ’ s simulations and verifications online, which makes all the expanding or re - configuring on basic cnc platform are all safe and restorable

    本文針對傳統專用數控系統的結構封閉、交互形式不通用和配置擴展不靈活方面的劣勢以及當前pc模式開放結構數控的體積龐大、開放程度不高和實時可靠性不強的局限，創新性地提出了以基本cnc框架+軟體、硬體和介面三種擴展形式為特徵的層次化開放結構的嵌入式cnc硬體平臺，並採用雙存儲區技術進行了cnc系統在線模擬校驗機制和安全保護機制的方案設計。
  2. This thesis has introduced the development of the traditional wireless sensor network and current situation at first, then analyzed the principle an framework of the wireless sensor network, and the challenge to the traditional wireless sensor network technology for environmental monitoring, put forward the novel environmental monitoring system based on wireless sensor network technology, have recommended a kind of brand - new wireless node design plan of framework of wireless sensor network and node hardware to be designed and realized, then based on ieee 802. 15. 4 standard, this thesis analysed the design faces the wireless communication protocol stack used in environmental monitoring, have introduced the realize of physics layer, data chain layer, network layer, application layer. have solved the wireless sensor network data sampling, systematic energy - conservation optimize, this thesis summarized the preceding work finally, have looked forward to the development, application and commoditization in the future

    本文首先介紹了傳統無線傳感器網路的發展概況及現狀，然後分析了無線傳感器網路的原理與架構及其在環境監測對傳統無線傳感器網路技術的挑戰，接著本文提出了新穎的基於無線傳感器網路技術的環境監測系統架構設計，介紹了一種針對大氣環境監測的全新的無線傳感器網路節點的構架設計方案以及節點的硬體設計和實現，然後本文以ieee802 . 15 . 4標準為基礎分析設計了面向環境監測應用的無線通信網路協議棧，從工程角度介紹了物理層、數據鏈路層、網路層、應用層的設計實現，解決了無線傳感器網路節點的數據採集、節點互聯以及系統節能優化等問題，最後本文總結了前面的工作，展望了基於無線傳感器網路技術的環境監測系統在未來的發展方向和應用方式等幾個方面的發展遠景。
  3. The control system make use of the advantage of c + + which is suitable to visit hardware, and package many control function into dll, so realizes the opening and makes user convenient to control and further development. moreover, the software system provide several drawing mode such as line and circle,

    該控制系統利用c + +便於底層訪問控制的優勢，通過動態鏈接庫（ dll ）編寫運動控制函數直接對硬體介面進行訪問，並把系統的各種控制功能通過動態鏈接庫（ dll ）提供給用戶，實現開放化，使用戶方便地實現對系統深層運動控制，進行二次開發及設備改造。
  4. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  5. While the key of embedded system software is embedded operation system ; one of the main works in os application is to write the hal ( hardware abstraction layer ) code. two open source code embedded operation system - uc / os and embedded linux were analyzed in this paper

    文中作者以broadcom主板為硬體平臺（基於motorola通信處理晶元mpc850 ）對兩種公開源代碼的操作系統uc os和嵌入式linux進行了研究與應用設計，其中的關鍵步驟是編寫硬體抽象層介面程序。
  6. Hardware abstraction layer. used to provide a generic interface to the hardware and " hide " hardware - specific functions

    硬體抽象層。用於提供硬體設備介面，可以「隱藏」硬體設備具體參數。
  7. With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit

    在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。
  8. Aim at the current practical situation, a kind design procedure is presented on terminal which based on arm and c / os -, and selects the arm microprocessor and operating system combine with the demand of the subject. it designs the hardware system based on the lpc2124 and the periphery interface chipset, and implements the transplantation of c / os - on the lpc2124, compiles the hardware drivers and the api based on c / os -, the system introduces multitask based on dispatching priority to solve the disadvantage of the foreground / background system. a kind of project on remote update software based on gprs and iap is presented, and discusses the reliability in the end

    針對目前實際情況，在研究了終端設計多項技術的基礎上，設計了一種基於arm和c / os -的配變監控終端，結合課題的要求對arm處理器和操作系統進行了具體選型，在基於lpc2124的mcu和外圍介面晶元上，進行了終端硬體系統的設計;實現了cos -在lpc2124mcu上的移植;編寫了基於c / os -的api介面函數和底層硬體驅動程序;採用多任務按優先權調度的方式解決了任務處理的實時性，克服了傳統前後臺軟體在復雜的監控終端設計中實時性差的問題;針對終端軟體升級方案進行了探討，提出了一種基於gprs網路的遠程在應用編程（ iap ）的軟體升級方案，對終端軟體升級模塊進行了軟、硬體設計，並對升級方案的可靠性進行了探討。
  9. Firstly the dissertation describes the hardware and software architecture, and shows the goal of this design. from requirement analysis to modules implementation, the dissertation gives the whole vision of the development process. secondly, it describes the low level layer implementation

    本文重點闡述了數字示波表的整體框架設計，圖形界面介面設計，內存管理設計，消息隊列管理以及底層硬體驅動程序和部分功能的實現，同時還說明了高級語言級別的軟體模擬系統設計和實現。
  10. ( 3 ) study deeply the structure of fat 16 file system and the characteristic of flash disk, and develop the file management software of flash disk to manage nc files effectively according to the management idea of fat 16 file system. ( 4 ) research the module and protocol of reliable communication in serial network, which are composed of arm main control board, dsp motion control board, keyboard board, i / o control board and encoder signal collection board, and then develop communication software of the serial network. ( 5 ) study the principle of displaying char in lcd and the method of embedding font library into operating system, and research deeply the method of embedding chinese font library into os in the light of the characteristic of chinese

    本論文的主要研究內容如下： （ 1 ）研究uc os -實時嵌入式操作系統在硬體平臺上的移植及其佔先式內核的任務調度原理，合理分割銑床控制系統的管理任務，根據任務的要求賦予不同的優先級和調度時間，保證任務的執行效率和實時性； （ 2 ）開發底層設備驅動程序和應用程序介面（ api ）函數，以便於進行系統應用軟體的開發； （ 3 ）深入研究fat16文件系統的結構和固態盤的硬體特性，參照fat16文件系統的管理思路，開發固態盤文件管理軟體以有效管理nc代碼文件； （ 4 ）深入研究由arm主控板、鍵盤板、 i o控制板、編碼器信號採集板等裝置組成的串口通訊網路可靠通信的模型及其通訊協議，開發串口通訊網路通信軟體； （ 5 ）研究字元的顯示原理和在操作系統中嵌入字庫的方法，在此基礎上結合漢字的特性深入研究中文字庫的嵌入方法，開發中文字庫嵌入軟體，滿足開發操作界面的信息要求； （ 6 ）深入研究三維圖形坐標變換的原理，開發實用的三維加工軌跡顯示軟體，便於操作者對零件的加工過程進行監控和診斷。
  11. This dissertation is supported by the following projects : national foundation for science research on the theory of sub - deep micro and super high speed multimedia chip design " ( no. 6987601 0 ) national foundation for high technology research & development " interface of vlsi ip core and related design technology " ( 863 - soc - y - 3 - 1 ) a - national r & d programs for key technologies for the 9th five - year plan research on high level language description and embedded technology for mcu " ( 97 - 758 - 01 - 53 - 08 ) national foundation for the ministry of education, prc " research on the optimal theory and methodology of soc software / hardware integration co - design and co - verification " ( moe [ 2001 ] 215 ) national foundation for science and technology publication " design of interface circuit for computer with verilog " [ ( 99 ) - f - l - 011 ] a deep research on system level design methodology of 1c and the design technology of mcu - ip and interface ip are made in this dissertation. the main work and achievements are as follows : 1 building block principle and the building block component maximum principle are brought forward based on the research of developing history of ic design

    本文基於以下科研項目撰寫：國家自然科學基金「深亞微米超高速多媒體晶元設計理論的研究」 （ 69876010 ）國家863計劃「超大規模集成電路ip核介面及相關設計技術」 （ 863 - soc - y - 3 - 1 ）國家「九五」重點科技攻關「 mcu高層語言描述及其嵌入技術研究」 （ 97 - 758 - 01 - 53 - 08 ）國家教育部「 soc軟硬體集成協同設計和驗證優化理論和方法研究」 （教技司[ 2001 ] 215 ）國家科技學術著作出版基金「 verilog與pc機介面電路設計」 （ 99 - f - 1 - 011 ）論文的主要工作和取得的成果如下： 1 、在研究集成電路設計方法學發展歷史的基礎上，提出了設計的積木化原則和積木元件最大化原則。
  12. The paper introduces these technologies as fellows : ( 1 ) the overview of virtual instrument ( 2 ) pci bus protocols and specifications ( 3 ) hardware section analogue signal conditioning circuit high speed a / d conversion circuit fpga circuit pci bus interfacing circuit ( 4 ) software section visual c + + programing hardware driver programing vhdl programing ( 5 ) the method and result of system test

    論文從以下幾個方面進行了闡述： （ 1 ）虛擬儀器概述（ 2 ） pci的協議規范（ 3 ）硬體電路設計模擬信號調理電路設計高速a d轉換電路設計fpga電路設計pci介面設計（ 4 ）軟體設計visualc + +編程設計底層驅動軟體編寫設計vhdl編程設計（ 5 ）系統調試方法和結果
  13. It consists of two part, the one is hardware : integrating the system of the arc welding robot ' s hardwares and its working principles, separating and extracting the original system ' s control signals, designing the control system openly and its working principles, constructing the structure and principle of the motion card based on dsp, designing the telecontroling teaching box or control panel of touching screen based on usb interface, applying for some software and hardware measures on control system ' s anti - jamming ; the other is software : putting forward the three levels opening software structure model of arc welding, comparing the opening of software structure model between osaca and ours, putting forward the solutions of the pri and communication among the threads of software system ' s modules, using the dll ' s techniques to solve software ' s module design and putting forward the frame codes, bringing forward the path planning software ' s realization by cp + ptp mode, discussing the real time of windows2000 operating system and advancing its solution

    具體包括，硬體部分：弧焊機器人硬體整體系統集成及其工作原理，原系統控制信號的分離和提取，控制系統的開放式設計及組成原理，基於dsp的運動控制卡結構和原理，基於usb介面的觸摸屏式遙控示教盒控制面板的設計，系統抗干擾的軟、硬體措施；軟體部分：提出了弧焊機器人的三層開放式軟體結構模型，軟體結構模型與osaca的模型進行開放性比較，給出軟體系統各模塊線程間優先級和通訊的解決方案，使用動態鏈接庫技術實現軟體模塊化設計並給出了框架代碼，給出了cp + ptp方式的軌跡規劃軟體實現過程， windows2000操作系統實時性問題的討論及解決方案。
  14. 2. the design of low - level driver of powerpc 405. after thoroughly collecting and consulting the latest information in the field of sopc, in this thesis we choose fpga embedded powerpc405 processor hardcore to construct the demanded sopc system, which manages to meet the application demand between

    論文課題在認真深入地調研了國內外sopc領域的最新資料后，選擇了嵌入powerpc405處理器硬核的fpga片上可編程系統，解決vxi介面與本地ram控制器的通訊和靜態存儲器存儲控制等方面的應用需求，通過powerpc硬體設計和底層驅動軟體編程，構建了滿足設計需求的高速數字測試系統。
  15. In chapter two, this paper introduces hardware and software platform, and the c / s / s architecture of the system

    在第二章中，全面介紹了easyibs3 . 0銀行綜合業務系統的硬體平臺、軟體平臺和系統所採用的c / s / s三層體系結構。
  16. Device interface component can shield low - level hardware, thus achieves the separation of top application design and bottom hardware, and implements the waveform application characteristic of platform - independence, portability and versatility

    設備介面組件對底層硬體的屏蔽能夠實現上層應用設計與底層硬體的分離，從而實現軟體波形的跨平臺性、可移植性和通用性特點。
  17. The first is the interface of software and hardware which is based on opc technology, its function is building the communication between the devices and the function components ; the second is the control module which corresponds with all of the function components according to the task and process ; the third is fms configurable components module, it can provides not only the friendly operation environment but also the configurable operation interface in line with the layout of devices on the workshop. on this basis, a prototype system is developed, by which the control system of the flexible manufacturing system is constructed for the teaching fms system in the cims center of college

    基於opc技術的軟、硬體介面模塊，它實現了fms的各功能組件對底層設備的數據實時採集和控制指令的下達; fms調度控制模塊，它根據加工任務和加工路徑要求，協調並控制著fms系統各個功能組件之間的邏輯動作操作順序; fms系統組態配置模塊，它不僅提供了友好的人機操作界面環境，而且還可依據現場設備布局的具體情況進行界面的組態布局配置。
  18. The paper conducts a thorough research of the method and principles in vna measurement, and performs detailed requirement analysis of system software relying on the hardware architecture. based on the requirement analysis, a detailed layered design is put forward, which partitioned the system software as three parts : user interface, data processing, hardware interface along with pci communication

    論文首先詳細研究了矢量網路分析儀的測量方法和測量原理，然後基於硬體構架對系統軟體進行了詳細的需求分析，在需求分析的基礎上進行了總體結構設計以及詳細的分層設計，把系統軟體的組成劃分為用戶控制界面、數據處理、硬體介面與pci通信三個部分。
  19. There are two techniques to implement that, the first is enterprise compute architecture six - layer model that contain hnl ( hardware network layer ), osl ( operation system layer ), dbl ( database layer ), asl ( application server layer ), bfl ( business framework layer ), bsl ( business system layer ) ; the second is business framework model which depart enterprise application system into many business components. the business components are independent and provide services to others through their consistent interface

    前者說明了xerp系統的六個層次，分別是硬體網路層hnl 、操作系統層osl 、數據庫層dbl 、應用服務器層asl 、業務框架層bfl和業務系統層bsl 。業務框架模型把企業的應用分解為許多業務組件，相當于erp中的功能模塊，各業務組件之間相互獨立，通過一致的介面對其它組件提供服務。
  20. Hal shields complex detail of low - level hardware, and supplies stable and friendly user interface to high - level software

    硬體抽象層屏蔽底層硬體細節，向上層功能軟體提供穩定、友好的用戶介面。
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