譯出指令 的英文怎麼說

中文拼音 [yìchūzhǐlìng]
譯出指令 英文
decode
  • 譯 : 動詞（翻譯） translate; interpret
  • 指 : 指構詞成分。
  • 指令 : 1 （指示; 命令） instruct; order; direct2 （上級機關對下級機關的指示） instructions; order; direc...
  1. Directives to the output at the beginning and end of each included file and around lines removed by preprocessor directives for conditional compilation. these directives renumber the lines of the preprocessed file

    指令添加到輸出中，添加的位置是每個包含文件的開頭和結尾以及被條件編譯預處理器指令移除的行的周圍。
  2. I put forward the generic principles of programming cross - platform code, use conditional compilation order to assert cross - platform application, deal with the difference between windows and linux in program source code, complete cross - platform source code, compile source code using delphi7, then the compiled application runs on windows. compile source code using kylix3, then the compiled application runs on linux

    提出了編寫跨平臺代碼的一般原則，使用條件編譯指令維護跨平臺應用程序，在程序的源代碼中針對windows和linux操作系統之間的差異進行了相應的處理，使得在源代碼級完成了跨平臺，然後只需要針對不同的操作系統分別編譯就可以在相應的操作系統上運行。
  3. When a well - written obfuscator tool goes to work on readable program instructions, a likely side effect is that the output will not only confuse a human interpreter, it will break a decompiler

    當一個編寫出色的模糊處理工具對可讀的程序指令進行處理之後，可能產生的一個副作用是輸出結果不僅使人看了不知所云，而且它還會使反編譯器無從下手。
  4. Based on these two factors mentioned above and the difficulty to implement in c compiler, this paper proposed a method of modifying operand type by inserting instruction lw or sw at assemble level as well as instruction scheduling. therefore, this can generate effective parallel instructions and correspondingly improve the performance and density of object code

    本文在分析了上述兩個限制并行指令生成的主要因素以及很難在編譯器中實現并行指令生成的基礎上，提出了在匯編級檢查指令的操作數類型，通過插入lw或sw指令來改變操作數類型及指令調度的方法，能夠有效的生成并行指令，提高了代碼運行效率和代碼密度。
  5. Abstract : the paper presents the method with the encoder and decoder instructions, with the switch of bcd in possession of six input points to realize the externally setting up in the device parameter in plc of multibit data

    文摘:本文提出應用數據編碼指令和數據譯碼指令，用一位bcd碼開關，佔用六個輸入點，實現多位數的plc器件參數的外部設定方法。
  6. ( 2 ) research the instruction launch strategy, controls correlation processing and data correlation processing of 32 - bit mips ’ s double - launching pipeline. obtained the design modes : static launch, optimized compile instruction, 1st pipeline jump and branch processing and double pipeline four channels front data path. ( 3 ) achievement designs by the platform xilinx ise 5. 2i, uses the verilog hardware description language to carry on the design description to the double - launching

    （ 2 ）對基於32位mips架構雙發射流水線的指令發射策略、控制相關處理和數據相關處理等流水線結構的重要問題進行深入研究，並得出了靜態發射、優化編譯指令序、第一流水線無延遲分支處理和雙流水線四通道前向數據通路等一系列能夠與32位mips架構相匹配的雙發射流
  7. To compile the client code for websphere xd v6, first set the environment variables java home and was home to specify the appropriate locations, then issue the following command all on one line

    要編譯websphere xd v6使用者端程式碼，首先設定環境變數java _ home和was _ home以指定正確的位置，然後發出下面的命令（都在一行上） ：
  8. The target of this research project is to develop an 8 - bit risc microcontroller, which is compatible with picmicrotm mid - range mcu family of microchip technology inc. in the instruction system. the author and the team spent more than one year in this project. they abstracted logic schematic from layout, sorted the circuits into different modules, analyzed and simulated all the modules, and then they mastered the structure of mcu, understood the operation of instructions and grasped the design style of picmicro

    本文作者及其研究小組在一年多的時間里，從版圖的電路提取，電路整理，電路分析到電路的設計和模擬，做了大量的工作，深入的分析了pic16c73b的組成結構和工作原理，完全的破譯了picmicro的指令系統，把握了微控制器的設計思想，設計出了與pic中檔微控制器兼容的微控制器，為開發自我知識產權的微控制器奠定了堅實的基礎。
  9. It aims at reducing the number of execution cycles of instructions, and has experienced from the period of single issue architecture to the period of multiple issue architecture. in the past twenty years, risc has become more and more mature abroad. it makes great sense to develop our own risc and it is a effective way to develop our own risc with the instruction set which is compatible with those of risc which has been widely used

    80年代初出現的risc技術是計算機體系結構的重大變革，它以減少指令執行的平均周期數為結構設計的主要目標，經歷了從單發射結構到多發射結構的演變過程，解決了深度流水技術、相關技術、轉移預測技術、編譯優化技術等一系列技術難點，在20多年的時間里， risc技術的發展已日趨成熟與完善微處理器在軍事和民用領域都有著廣泛的應用，研製具有我國自主獨立版權的微處理器在當今具有重大意義。
  10. A facility that permits a programmer to selectively list single instructions or short segments of code during compilation

    一種設施，允許程序員在編譯期間有選擇地列出一些單獨指令或短程序段。
  11. Optimization when compiling six approaches are proposed : constant embedding, constant propagation, duplication propagation, flag update elimination, conditional instruction merge and instruction scheduling

    編譯期優化提出六種編譯期優化的手段:只讀常量內嵌，常量傳播，復制傳播，消除無用標志位更新，條件語句合併和指令重排。
  12. With software and hardware co - design method, this paper proposes an algorithm to calculate register lifetime in programs, and the control of writing results back into rf is implemented through an enable control signal provided by instruction encoding at compile time

    基於軟硬體協同設計的思想，在研究局部變量生存期演算法的基礎上，本文提出了通過編譯器指令編碼實現對硬體結構的使能控制，即控制流水輸出結果是否寫回寄存器文件，以減少對寄存器文件的寫次數，從而降低寄存器文件埠的讀寫壓力。
  13. Firstly, to improve the mpiformatdb ’ s speed, a novel parallel algorithm based on shared memory architecture is presented. by adding openmp directives, the cycled parallel structure is formed from the serial algorithm

    為了提高mpiformatdb的性能，本文提出一種基於共享存儲結構的并行演算法，通過在原串列演算法中增加openmp編譯指導命令來構造循環級并行結構。
  14. A design method based on the decomposition and multiplexing technique of complex instruction, combined the decoding arithmetic of instruction and a step counter together, sub - step realization method of multiclocks is proposed. the similarities and differences of architecture between fsm and multi - ? ocks are discussed from two aspects, timing and state space

    提出了執行周期復用的指令分解、指令寄存器與步長計數器聯合譯碼，以及多時鐘同步的控制流設計方法；進而從時間和狀態空間兩個角度深入討論了控制流設計中狀態機和多時鐘兩種常見體系結構的異同。
  15. Lists options available for the command line compiler and links to topics that organize the options either alphabetically or by category

    列出可用於命令行編譯器的選項，並提供鏈接，指向有關按字母順序或按類別組織選項的主題。
  16. The following table lists the command - line options. in addition to the listed options, all single - letter compiler directives can be specified on the command line, as described in compiler directive options

    下列表中列出所有的命令行參數。在附加的選項列表中，所有的單字元編譯器指令都可以在命令行編譯中使用，詳情請參照：編譯器指令。
  17. It has great strategic influence, and is just our target. at first, this paper reviews the current situation in the general - propose microprocessor designing field. with an analysis and comparison of the two mainstreams, the post - risc and vliw, a conclusion is drawn, vliw has more benefits than its disadvantages, will be the flow of the tide in the coming future

    本文首先考察了通用微處理器設計的現狀，分析比較了post - risc超標量和vliw兩種結構，得出結論： vliw結構以靜態編譯代替動態指令調度提取ilp ，雖然導致了代碼兼容等問題，卻實現了更大程度的ilp ，且簡化了硬體設計的復雜度，利大於弊，是微處理器設計的大勢所趨。
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