采樣示波器 的英文怎麼說

中文拼音 [cǎiyàngshì]
采樣示波器 英文
sampling oscilloscope
  • : 采名詞(采地) feudal estate
  • : Ⅰ名詞1. (形狀) appearance; shape 2. (樣品) sample; model; pattern Ⅱ量詞(表示事物的種類) kind; type
  • : Ⅰ動詞(擺出或指出使人知道; 表明) show; indicate; signify; instruct; notify Ⅱ名詞1 [書面語] (給...
  • : Ⅰ名詞1 (波浪) wave 2 [物理學] (振動傳播的過程) wave 3 (意外變化) an unexpected turn of even...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  1. In 2000 passed theiso9001 quality system authentication, the main camp product includes : the filter, filters the separator, the oil - water separator, thesilencer, cuts shui qi, the respiration valve, the fire resistance, the hydraulic pressure safety valve, kong leijian, the metal vlexiblehose, the ripple compensator, fluctuates under the oil installment, the pot the sampling, the crane tube, lightly falls the springboard, the steel structure trestle, the liquid level indicator, the oilinterceptor, the heater, regards product and so on boundary

    2000年通過了iso9001質量體系認證,主營產品有:過濾、過濾分離、油水分離、消聲、切水、呼吸閥、阻火、液壓安全閥、孔類件、金屬軟管、紋補償、浮動出油裝置、罐下、鶴管、輕落跳板、鋼結構棧橋、液面指、阻油、加熱、視境等產品。
  2. The video signal processing circuit realizes the primary catching, filtering and signal amplifying. variable threshold binarization processing circuit and two - channel counter are designed to sample to count the output pulse signal, which is processed, deposited and displayed in microprocessor. the communication interface circuit with the computer is also designed

    視頻信號處理電路完成了原始信號的初級捕捉、濾、視頻放大等處理,設計了浮動閾值二值化處理電路,採用兩路計數對輸出脈沖信號計數,最後送入微處理進行運算處理,可實現測量值的儲存、顯等,並設計了與上位機的通訊介面。
  3. First of all, the paper illustrates kinds of dso, theory of random sample convert and the task " aim

    本文首先介紹了數字化的分類,隨機技術的基本原理及課題任務。
  4. Then the paper analyzes control system of hybrid active power filter, the way of harmonic detecting and the principle of control system, digital low pass filter and the generation of pwm, on the base of which the paper designs a new parallel hybrid active power filter which is controlled by tms320lf2407, and detailedly introduces drive circuit of pwm, sampling circuit of current, voltage adjustment and protection circuit, communication circuit, liquid crystal display circuit

    分析了混合型有源濾的控制系統、諧檢測方法及控制原理、數字低通濾和pwm信號的產生,在此基礎上設計了一種基於tms320lf2407為控制核心的並聯混合型有源電力濾硬體原理圖。並對pwm驅動電路、電流電路、電壓調整、按鍵輸入和保護電路、通信模塊、液晶顯模塊進行了較詳細的分析說明。
  5. The measurement system consist of computer, 16 - channel high speed data acquisition board, spark plug pressure sensor, crank angle signal generator, charge amplifier and oscillograph. the max acquisition frequency of this system is 1mhz

    由通用微機、 16通道無相差高速數據採集卡、火花塞式壓力傳感、角標信號發生、電荷放大組成的高速數據採集系統,最高總頻率為1mhz 。
  6. In the time - domain, based on the principle of random sampling of dso. two way ( " time amplifing in dual slope integral " and " time - voltage convert " ) are implemented to measure the time between the system triger and writing clock. thus random sampling interpolate can be done to measure repeated signal in high frequency with the a / d convert and controller which frequency are lower

    在時域,根據數字隨機取原理,用兩種方法(雙斜率積分時間放大測量方法和時間? ?電壓轉換測量方法)測量數字系統觸發和寫時鐘間時間間隔,用低速a / d轉換及控制進行模?數轉換和控制,以此進行隨機取內插,從而實現了對高頻率重復信號的測量。
  7. Dsp56f805 samples the ultrasonic pulse coming back from the target, then measures the distance and shows it on led. tms320vc5509a is accomplished the detecting speed and the main control of the radar system, is 16 fixed dsp with high performance and low power produced by ti company. dsp5509a samples the wave coming from t / r module, then measures the target ’ s speed and send this information to the assistant control chip - p89v51 based on boost c51 core mcs produced by philips company, which controls the lcd

    測距雷達系統的控制和信號處理的核心晶元是motorola公司的dsp型16位單片機56f805 ,由它對超聲脈沖進行ad后,計算目標距離並在七段數碼管上顯。測速雷達系統中信號處理的核心晶元是ti公司的超低功耗、高性能的16位定點dsp ? ? tms320vc5509a ,由它對收發組件輸出的多普勒回進行,計算出目標運動速度后,送給輔助控制晶元? ?飛利浦公司生產的基於c51內核的增強型單片機p89v51 ,並且在液晶顯上顯速度信息。
  8. The framework of the instument is analyzed firstly, and the paper focuses on the ecg pre - amplifier design, the data acquisition module based - on isa bus with multi channel inputs is realized, the system software that can fulfill the data acquisition, display and communication is also designed. the two patterns of the network communication is introduced in detail

    本文首先分析了智能網路型心電圖系統的結構,重點敘述了前置隔離型心電圖放大的設計,研製了具有定時功能的多通道數據採集系統,編制了集、實時形顯、測量及網路通信等功能於一體的系統軟體。其中對心電圖儀網路通信部分的兩種模式作了詳細介紹。
  9. The project is to develop the 100mhz wideband digital storage oscilloscope ( wdso ) , typical performance character : input signal - 3db bandwidth is 100mhz, real time sampling frequency is 20msa / s, equivalent sampling frequency is 10gsa / s, resolution is 8bits, dual signal channel, and delicacy is 5mv 5v div per channel , time sweep velocity is 2. 5ns - - 5s div 。 so the project is provided with higher performance - to - price ratio, stronger competitive capacity in market and widest applied foreground at the area of wdso

    本次課題的具體目標是實現100mhz帶寬的數字存儲機的研製,具體主要性能指標達到最高實時率20msa / s 、等效率10gsa / s 、被觀測信號3db模擬帶寬達100mhz 、數字解析度8bit ;雙通道,幅值靈敏度: 5mv 5v div ,掃速2 . 5ns - - 5s div 。該方案具有較高的性價比,較強的市場競爭力和廣闊的應用前景。
  10. The project is to develop the 100mhz bandwidth, equivalent sampling frequency is 1g / sa, resolution is 8bits, dual signal channel, and delicacy is 5mv - 100v / div per channel, time sweep velocity is 20ns - - 5s / div digital storage oscilloscope ( dso ) 。 achieved equivalent sampling is innovative and main content of the project

    本設計的具體目標是實現帶寬為100mhz ,等效率為5gsa / s ,數字解析度為8bit ;雙通道,幅值靈敏度為5mv 100v / div ,時基為: 10ns 5s的手持式數字存儲.等效的實現是本設計的創新點和主要研究內容
  11. The main chip of the usb interface circuit is a cypress semiconductor ' s product, cy7c64613, which has intergrated usb sie ( serial interface engine ) and enhanced 8051. the oscilloscope module is realized according to the real time sampling principle. it has two signal chunnels and a dual 8 - bit dual a / d converter whose most sampling rate is 40msps, so two signal acquisition can occurs in the same time

    隨后介紹虛擬儀測試平臺中各硬體模塊設計實現: usb介面的主晶元是cypress公司的cy7c64613 ,此晶元集成了usbsie和8051核;模塊根據實時取原理實現,採用雙8位a / d轉換,提供兩條信號通道,可以同時採集雙路信號,最高的率為40mhz ;信號源模塊採用直接數字合成( dds )原理實現,它所能產生的信號頻率為10hz 5mhz ,最小頻率解析度為9 . 537hz 。
  12. In this project, we adopt dsp + fpga structure. for its great flexible and universal characteristic, we will design and develop a digital storage oscillograph based on this structure, which sampling frequency is 5 gsps, bandwidth is 100 mhz

    本項目是採用dsp + fpga結構,採用實時和隨機兩種取技術,實現5gsps最高等效率, 20mhz等實時帶寬的手持式數字存儲
  13. In the end, the divisional resampling is applied to the demo system of trajectory planning and trajectory control, which indicates that it can increase the efficiency of the particle filter and be applied in practice

    最後,將其應用於飛行航跡規劃與控制的模擬演系統,結果表明,分區重演算法提高了粒子濾演算法的效率,可以在實際中推廣應用。
  14. Firstly, the theory and the architecture of hardware system are described, secondly, the steps of the signal processing are discussed in detail. based on the experiments and the characteristics of the signal, we pre - process the signals with band - pass filter, proportional amplifier and coherent demodulator. after sampling and analysis doppler information, we display the final results distinctly to alarm in time

    然後,結合系統中各主要部分的任務,詳細介紹了信號處理的各個步驟:通過實驗比較,並結合接收信號的特點,選用帶通濾、比例放大、相干檢等技術對信號進行預處理;然後對獲得的多卜勒信息進行和頻譜分析;最後,用比較直觀的形式顯數據結果,以及時準確地告警。
  15. The radio frequency receiver supports interface for instrument and base station and air interface for mobile station, and it takes the task of magnifying low noise and down - convert and digital baseband processor filtering and magnifying intermediate frequency to reverse link signal. the digital baseband processor samples the received signal after down - convert radio frequency signal to intermediate frequency signal and processes other processing and supports interfaces to computer, next sends data to computer. the gps receiver supports interface for instrument and gps system, and receives gps system signal, next it demodulates the correlative information and sends out benchmark clock signal we need

    射頻接收部分主要為儀和基站、移動臺提供空中介面,其主要任務是在反向鏈路上對接收到的射頻調制信號進行低噪聲放大、射頻下變頻變換、中頻濾放大等;數字基帶部分為對接收信號變頻為中頻后進行a / d,以及其他的rsp處理並和計算機提供介面,將數據送至計算機進行后臺處理、顯等; gps接收機部分為儀和gps系統提供介面,接收gps系統信號並解調相關信息,輸出所需的電文及時鐘基準信息等。
  16. The system discussed in the dissertation has the architecture built with dsp and fpga, we will design and develop a data acquisition system based on this structure, which sampling frequency is 1 gsps, bandwidth is 200 mhz

    本文設計的數字採集系統採用dsp + fpga的智能儀結構,採用實時取技術,實現1gsps最高率, 200mhz帶寬的數字存儲
  17. In order to experiment the application of bandpass sampling theory in digital o - scilloscope, multiple clocks of high quality were required, from whe - re the design of the main oscillation source with alterable frequency came into being

    為實驗帶通理論在數字中的應用,需提供高質量的多種時鐘,由此產生的可變頻率主振源設計。
  18. The oscillograph typical performance character is up to 500msps by way of real time sampling, and 40gsps by way of equivalent sampling

    要求實時率達到500msps ,等效率達到40gsps 。
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