頻率合成器 的英文怎麼說
中文拼音 [bīnlǜgěchéngqì]
頻率合成器
英文
frequency combiner- 頻 : Ⅰ形容詞(次數多) frequent Ⅱ副詞(屢次) frequently; repeatedly Ⅲ名詞1 [物理學] (物體每秒鐘振動...
- 率 : 率名詞(比值) rate; ratio; proportion
- 合 : 合量詞(容量單位) ge, a unit of dry measure for grain (=1 decilitre)
- 成 : Ⅰ動詞1 (完成; 成功) accomplish; succeed 2 (成為; 變為) become; turn into 3 (成全) help comp...
- 器 : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
- 頻率 : frequency; rate
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A 45 48 mhz pll frequency synthesizer for cordless phone receiver
接收機鎖相環頻率合成器Luo bin ( optics engineering ) directed by yu xuecai, zong derong based on the laser mode locking principle, this paper focuses on the study of dds acousto - optic mode locker
本文根據鎖模激光原理,進行了dds (直接數字頻率合成器)聲光鎖模器的研製。As an important target of frequency synthesizer design, phase noise determines system ’ s sensitivity and selectivity whose design is being the emphasis as well as nodus at all times
它作為頻率合成器的重要指標,決定了系統的靈敏度和選擇性能,一直是設計者的難點和重點。The designs of the pfd, digital filter ocxo and fractional - n counter in the frequency synthesizer unit are discussed, based on the pll theory. in order to improve the precision of pll, some design methods of pfd are given, and its feasibility is validated by the fpga hardware implement
2 .在鎖相理論指導下,第三章討論了頻率合成器設計中的鑒頻鑒相器、數字濾波器、恆溫壓控振蕩器和分頻電路設計。為了進一步提高頻率合成的精度,文中給出了提高鑒頻鑒相器性能的一些設計思想,結合fpga的硬體設計驗證了其可行性。Bicmos pll frequency synthesizer for uhf receiver
4106的鎖相環頻率合成器設計與實現Design and realization of pll frequency synthesizer based on mc
頻率合成器設計與實現Design and implementation of a c - band frequency synthesizer
頻段頻率合成器的設計與實現Application of single chip microcomputer at89c2051 in uhf frequency synthesizer
頻率合成器中的應用In this paper, the development of present situation and technology level of fast frequency synthesizer are analyzed and summarized. also, the theory and methods of fast frequency synthesizer are expounded profoundly
分析總結了當前國內外快速頻率合成器發展的現狀與技術水平,深刻的闡述了實現快速頻率合成理論和方法。In this system two oscillator are used for mixing. pll for high local oscillator and dds + pll for low local oscillator. by making full use of favourable narrow - band tracing filter character of pll and by combining the merits of dds such as super fine frequency resolution, high frequency accuracy, very fast frequency hoping with it, the pll / pll + dds frequency synthesizer presents wide band high quality source and super small frequency hoping step
系統採用兩次混頻,其中高本振的設計採用pll鎖相環頻率合成來實現,充分發揮了鎖相環頻率合成器的優良特性,實現了系統所要求的高質量寬頻帶本振源;低本振採用pll + dds頻率合成來實現,結合pll優良的鎖相特性與dds的高頻率解析度、高頻率精確度等優點,實現了頻率的小步進高精度合成。This paper introduces the method of using the simulation tool " genesys for pll " for the pll synthesizer design, and presents the analysis of the simulation results on bass of which some guiding practical conclusions are drawn, and some problems requiring attention in the simulation process are listed
摘要介紹了模擬軟體genesys在鎖相式( pll )頻率合成器設計中的使用方法,並對模擬結果進行了分析,得出了一些有指導意義的實用性結論,列出了在模擬時需要注意的問題。Pll frequency synthesizer is increasingly used in microprocessor systems and communication. with the development of integrated circuits and the emergence of soc ( system on a chip ) technology, it has been a fundamental and very important module in analog and mixed - signal integrated circuits
鎖相環頻率合成器現在日益廣泛地應用於通訊、微處理器系統中,並且隨著集成電路的發展以及soc技術的出現,其已經成為超大規模集成電路中不可或缺的模塊。In receiver system development, there are some innovations in the design of high linearity and high dynamic range, also in the circuitry realization
接收機採用兩次變頻超外差式結構設計,第一中頻為高中頻。接收機頻率合成器採用dds來實現1hz的頻率解析度。This design keep the twice frequency transform and the superheterodyne structure in analog receiver, and use programmable direct digital synthesizer ( dos ) in rf section. use this method, we can not only inherit the advantage of high sensitivity and high selection in traditional design, but also improve the automation of the equipment
該方案保留了原模擬接收機二次變頻的超外差結構,在射頻前端利用了可編程的數字頻率合成器( dds ) ,這樣既繼承了原接收機的高靈敏度,高選擇性的優點,又提高了它的接收機自動化特性。Since commercial pll ic came out, phase - locked - loop frequency synthesis has become widely accepted. but when narrow frequency - step is required, the loop bandwidth has to decrease while cannot meet the demand of frequency - hopping speed
數字鎖相集成器件出現以來,鎖相式頻率合成器得到迅速發展,但是當需要窄頻率步進時,環路帶寬需要降低,致使鎖定時間變長,不能滿足快速跳頻的要求。Design of broadband phase locked sweep frequency source
2306在鎖相環式頻率合成器中應用Frequency synthesizer is the key component in electronic systems
頻率合成器是電子系統的核心部件。The core of a frequency hopping system is the frequency synthesizer
在跳頻系統中,頻率合成器是核心部件。Dfs digital frequency synthesizer
數字頻率合成器An overview of architecture design of frequency synthesizers for wireless applications
無線通訊系統頻率合成器結構設計綜述分享友人