frequency multiplier 中文意思是什麼

frequency multiplier 解釋
倍頻器頻率倍增器
  • frequency : n. 1. 屢次，頻仍，頻繁。2. （脈搏等的）次數，出現率；頻度；【物理學】頻率，周率。
  • multiplier : n. 1. 增加者,增殖者,繁殖者。2. 【數學】乘數；【電學】倍增器,擴程器,增效器,倍率器。3. 【經濟學】收益增值率。
  1. Chapter 5 is about the design of millimeter wave solid circuit included frequency multiplier, low noise amplifier, medium power amplifier, mixer, if amplifier lastly, based on the work above, a millimeter wave t / r module is developed and the analysis of the result is also introduced

    第五章毫米波固態電路，詳細分析了毫米波倍頻器、低噪聲放大器、毫米波放大器、混頻器的理論，製作了毫米波混頻器、毫米波放大器、中頻放大器、倍頻器等有源電路。最後，在上述基礎上製作了毫米波t / r組件。
  2. Because massive harmonic interference in the electrical network, it causes signal - sampling to include the very big harmonic in the measurement system, for eliminating measurement result influence by harmonic, the paper has an in - depth study of fourier transformation harmonics analysis measurement principle, analysis the forming reasons of frequency spectrum leakage and railing effect during measurement, achieves phase locked loop and frequency multiplier technique to realize integer - period synchronous sampling and eliminate impact of frequency spectrum leakage and railing effect in the result of measurement, and investigates in depth theory on phase locked loop and frequency multiplier technique, gives the method of realizing phase locked loop and frequency multiplier technique

    由於電網中存在大量的諧波干擾，導致測量系統中取樣信號也含有很大的諧波，為了消除諧波對測量結果的影響，論文深入研究了傅立葉變換諧波分析法的測量原理，分析了測量中頻譜泄漏和柵欄效應形成的原因，提出了採用鎖相環倍頻技術實現信號的整周期同步采樣，消除頻譜泄漏和柵欄效應對測量結果的影響，並對鎖相環倍頻技術的理論進行了深入研究，給出鎖相環倍頻技術的實現方法。
  3. A counter with timing fiducial oscillator acts as a frequency multiplier, and the count value in the prior period is taken as the reference for the current period to give the decimal part of a signal period

    該方法利用帶基準時基的數字計數器實現周期內線性細分，當前周期信號將前一整周期的倍頻數作為參考構成信號周期的小數部分。
  4. To meet the waveform requirements, dds + multiplier + upconverter was used to realize the c - band fmcw frequency source

    為滿足波形參數要求，本文設計了dds +倍頻+上變頻的c波段三角形調頻連續波頻率源。
  5. Research on the design of programmability frequency multiplier and phase detector on isp devices

    器件的可編程倍頻鑒相邏輯電路的設計
  6. Design and realization of a single - chip digital phase - locking frequency - multiplier circuit

    單片數字鎖相倍頻電路的設計與實現
  7. At first, the fundamental theories and realization methods of main parts of high purity frequency source in x band object simulator of vehicle - carried phased - array radar, such as phase - locked - loop, step recovery frequency multiplier, dielectric band - pass filter and micro strip band - pass filter are introduced in detail in this paper

    本文一開始洲門針對機載相控陣雷達目標模擬器中的高純本振源的實現，詳細地介紹了瑣相環、階躍管倍頻器、介質帶通濾波器和微波帶通濾波器的基本原理及其實現方法。
  8. Crystal frequency multiplier

    晶體倍頻器
  9. In this chapter, the suitable devices and circuit structure have been choosed to design a second order multiplier, a fifth order multiplier, a sixth order harmonics mixer and a dro operating in 9. 4ghz. the forth chapter is a section of system realization and test, in this chapter, the system of low phase noise frequency source has been constructed and tested. the results show that the targets of the system have been achieved

    第三章的系統分器件與實驗數據部分，主要是以上述第二章的分析為基礎，以所推導的理論公式為指導選取必要的器件和合適的電路拓撲結構，分別設計實現了一個二次倍頻器，五次倍頻器， 6次諧波混頻器和一個9 . 4ghz的介質振蕩器，為後述整個系統的實現在硬體上做了必要的準備。
  10. Following the application and development of multiplier device and circuit, the research of mulitplier theory is increasing. today frequency multiplying technology has reached a new level

    隨著倍頻器件和電路的應用與發展，對倍頻理論研究也日益深入，目前倍頻技術已達到了一個新的水平。
  11. In the experiment research, the avalanche diode frequency multiplier with 15th order has the maximum output power of 4. 29 mw and 0. 85 % efficiency, achieving the purpose of our project

    在實驗研究中，雪崩15次倍頻器最大輸出功率4 . 29mw ，倍頻效率0 . 85 % ，實現了課題的研究目標。
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