hardware debug 中文意思是什麼
hardware debug
解釋
硬體調試-
Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc
基於dsp開發板，作者完成了dsp的多通道緩沖串口（ mcbsp ）接收gps中頻接收機輸出信號的硬體調試，並解決了多通道同步串口數據的接收緩沖、數據合併、 udp數據報裝幀及網路介面驅動等軟體編程。在pc端，通過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解幀譯碼、高速存貯，利用windows消息機制開發了應用程序友好界面。 -
The designing process of the edac circuit is described in the paper. the time simulation is analysed, too. the designment of the circuit has access the hardware debug, and can woks normally
此外還將第一輪設計中的基本邏輯器件如與、或、非門以及諸如244 、 255 、譯碼器等小規模元器件都集成到fpga內部來實現。 -
Part two : design the schematic of the intelligent communication card ; to apply protel99 software to design sch and pcb charts, then send them to the factory ; to debug on the hardware and test on can bus chip ; to program assemble language control and can bus communication software of the intelligent communication card and debug on the super ice16 simulator ; to utilize the super ice 16 simulator to debug the control programs of the communication card online ; link to control card and debug the can bus communication program online ; to debug the system on eprom
第二部分：設計can總線智能通信卡的硬體電路，應用protel99設計軟體繪制原理圖及印刷電路板圖，並送廠製作板卡電路板:智能通信卡硬體製作和can總線晶元調試;編寫通信卡控制及can總線通信匯編語言程序並編譯;在superice16模擬器上在線模擬調試控製程序;連接系統控制卡，模擬調試can總線通信程序;程序燒入eprom晶元，進行系統eprom模擬調試;介面系統驅動程序及測試軟體調試。 -
( 4 ) debug the software and hardware of pulse compression system and the system in radar. the system is ultimately used in radar system successfully
（ 4 ）脈沖壓縮系統軟硬體調試及與雷達系統的聯試，最終交付使用。 -
4. debug the hardware and software of the control system, to verify the feasibility of the dsp control system for the experiment platform
進行系統聯調，驗證dsp在船舶減搖水艙試驗臺架控制系統中的可行性。 -
The features of the new type of integration scheme can be described as follow : high division and easy debug are achieved in the scheme ; accumulative total is used, and the discord of integer part and decimal part are avoided in the scheme ; it can divide as well as detect direction ; it can integrate the counter into isp device and then evaluate the maxim frequency of the counter ; it also integrate square wave and some logic devices into isp device, and then improve integration, reliability, stability ; and have the character of software designation instead of hardware designation and in - system programming, and it becomes very easy to modify the circuit and to extend the function
新型的集成化設計方案具有以下特點：細分數高而且調整方便；採用累積計數，避免大小數分別計數的不協調；細分同時完成辨向；可以在isp器件內完成計數功能，從而提高了計數器的最高工作頻率；同時將方波發生器和一些外圍的數字電路集成在一片isp器件內，提高了系統的集成度，性能可靠穩定；具有硬體設計軟體化及在系統可編程的特點，便於電路的修改和功能的擴展。 -
First, the implementation project of the if digital receiver of tdrss user transponder by the fpga and dsp cooperation design method is proposed in this thesis. then, the software simulation system for the if digital receiver is built up, definite word - length effect is analyzed, and some useful conclusions are derived, which provides reference for the following hardware design and debug
本文首先採用fpga與dsp協同設計的方法實現該接收機的方案，然後建立了該中頻數字接收機的軟體模擬系統，對有限字長效應進行分析，得到了一些重要結論，為下一步的硬體設計和調試提供了參考。 -
In the design of this project, the author has participated in the following works : the system design, chips selected, and making schematic circuit diagram of the interface hardware, and pcb design 、 debug, and the fpga control - program design, system testing and debugging, and some drivers of wince. this paper will introduce the principle of the dvb - t series standards firstly, then the sketchy design of the system will be stated
本人主要從事系統設計，接收板硬體原理圖及印製電路板（ pcb ）設計製作並調試， fpga控製程序設計， wince部分驅動程序開發和系統聯調等工作。本文在介紹數字地面電視廣播（ dvb - t ）相關標準的基礎上，闡述了系統總體設計，軟硬體實現具體方案與原理 -
The author schemes out the system ' s principle circuit, and completes the design, debug of hardware and software, test of the prototype performances
作者設計了電路原理圖，完成了系統軟硬體設計、調試，和對系統原理樣機性能的測試。 -
In the end, the paper shows the design and debug of the software and the hardware done by the author
最後介紹了與課題相關的軟硬體設計、實現及聯調。 -
( 5 ) debug the whole system including the application program, driver program and hardware ; test the result of the system
（ 5 ）完成了系統所有軟硬體的聯調以及測試。 -
Designing the circuit board with the eda software protel, downloading the control programme and completing the hardware debug 5
4 .用eda軟體protel設計電路板，下載控製程序，完成系統的硬體調試。 -
The main two process of the development on system is as follows : part one : using prote199 software to design the sch chart of the analog signal input card and complete pcb charts, then have them made in factory ; to debug on the hardware ; to program assemble language control software of the analog signal input card and debug on the super ice 16 simulator ; to utilize the super ice 16 simulator to link card to debug the control programs online ; to embed the control program debugged successfully into eprom and debug the system on eprom
系統研製開發過程主要分兩大部分：第一部分：應用protel99設計軟體設計模擬量輸入卡的硬體原理，規劃設計印刷電路板圖並送廠製作板卡電路板；模擬量輸入卡硬體製作和調試；編寫模擬量輸入卡匯編語言控製程序，在superice16模擬器上編譯調試；編譯后的控製程序在superice16模擬器上以在線方式模擬調試；模擬調試成功的控製程序燒入eprom晶元，進行系統eprom模擬調試。 -
To debug on the hardware, eliminate circuitry errors, and test on every chip. 3
對板卡硬體調試，線路排錯，晶元測試； 3 -
Most software design like model calculation and display of various interfaces is colnpleted. the unfinished work is detection of hardwar and debug between hardware and software. in the meantime, we should using better arithinetic to increase the position accuracy of inertial navigation system
有待進一步開展的工作是將慣導系統軟硬體對接進行系統聯調和實現對慣導系統硬體的故障檢測，同時，在慣導系統的運算上，還有待于引入更好的數學演算法，以便更好的提高慣導系統的定位精度。 -
In this project, the author is responsible for the hardware design of fpga and debug of hardware and software. this thesis analyzes the digital signal processing algorithm of the responder and its realization in detail
論文詳細分析了接收機信號處理演算法在fpga中的硬體實現方案，在提高系統可靠性、穩定性以及fpga約束文件設計方面做了較深入的探討。 -
Finally, the circuit board is designed and the hardware debug is performed
最後設計系統的硬體電路板，完成整個系統的軟硬體調試。 -
3. completing the circuit design based on the serial fiber transmission and the parallel fiber transmission and theirs hardware debug
3 ：設計了通過光纖傳輸的串列傳輸方式和并行傳輸方式的電路並完成了硬體調試。 -
Firstly, analyzes the theory of previous transformer calibrator, based on the theory of previous transformer calibrator, propose the improvement method and expound the reality meaning of studying the topic. secondly introduces the measure theory of transformer calibrator, designs the transformer calibrator system of hardware control : digital disposal module design, module board design, the emc design and summarizes the system of hardware debug
本文首先介紹了國內外互感器校驗儀的發展現狀，基於互感器校驗儀的發展現狀提出了改進的方法和本課題研究的主要內容，闡述了開發本課題的現實意義；接著介紹了互感器校驗儀的測量原理，對互感器校驗儀控制系統硬體進行了詳細的設計：數字處理模塊的設計、模擬板電路硬體設計和電磁兼容性設計。 -
As for the fiber transmission, this paper introduces two ways of fibre transmission which are serial transmission and parallel transmission. the problems met in the hardware debug of fibre transmission are also analyzed
對于光纖傳輸，文中介紹了通過光纖傳輸的兩種方式：串列傳輸和并行傳輸，並對光纖傳輸硬體調試中遇到的問題進行分析。
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