insertion delay 中文意思是什麼
insertion delay
解釋
插入延遲-
This paper introduces a kind of technology, by which a new type of polarization delay structure is used to manufacture narrow - channel - interval interleavers, which arc characteristic of small in insertion loss, polarization dependent loss and polarization mode dispersion, and easy in assembly
文章介紹了一種利用偏振延遲結構製作窄通道間隔的梳狀分波器的技術，使用該技術製作的梳狀分波器具有插入損耗低、偏振相關損耗低、偏振模色散小且組裝方便等特點。 -
An algorithm of path - based timing optimization by buffer insertion is presented. the algorithm adopts a high order model to estimate interconnect delay and a nonlinear delay model based on look - up table for gate delay estimation. and heuristic method of buffer insertion is presented to reduce delay. the algorithm is tested by industral circuit case. experimental results show that the algorithm can optimize the timing of circuit efficiently and the timing constraint is satisfied
提出了一種基於路徑的緩沖器插入時延優化演算法，演算法採用高階模型估計連線時延，用基於查表的非線性時延模型估計門延遲.在基於路徑的時延分析基礎上，提出了緩沖器插入的時延優化啟發式演算法.工業測試實例實驗表明，該演算法能夠有效地優化電路時延，滿足時延約束 -
Some of these considderationsinclude insertion loss, cross talk, propagation delay, and unterminated stubs
需要考慮的因素包括插入損耗、串擾、傳輸延遲和未端接短截線。 -
Path - based timing optimization by buffer insertion with accurate delay model
採用精確時延模型基於路徑的緩沖器插入時延優化 -
A fine - grain sleep transistor insertion technique based on our simplified leakage current and delay models is proposed to reduce leakage current
摘要首先給出一種泄漏電流和延時的簡化模型，並且在此基礎上提出了一種降低泄漏電流的細粒度休眠晶體管插入法。
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