logic block 中文意思是什麼
logic block
解釋
邏輯區段-
Primary policy of design is sorting and distilling logic function block ? lfb first, then choose the language of configuration and lfb development for msr
設計的主要方針是首先分類和提取出邏輯功能模塊lfb ，接著選擇msr使用的配置及lfb開發語言。 -
Through the implementing of kernel level file and cache mechanism at the client side, this newly proposed distributed network file system provides seamless network file access and reduces the performance decline caused by network transmission. utilizing the concept of logic block server, it provides the reliable data block storage and implements redundant storage capacity. utilizing the concept of the index server, it provide s the cost of the greatly for server and network during data access process and realizes the computing with balancing capacity
在客戶端通過實現內核級文件的調用和緩沖機制，實現了文件的無縫網路存取，並減少由於網路傳輸帶來的性能下降的影響；利用邏輯塊服務器實現邏輯塊的冗餘存取，實現數據塊的安全存放；利用索引服務器進行負載均衡計算，實現資料存取的較低網路和服務器開銷；利用索引服務器實現服務器組的零管理，使該系統具有高效性、穩定性和可伸縮性。 -
The risc mcu core is based on harvard architecture with 14 - bit instruction length and 8 - bit data length and two - level instruction pipeline the performance of the risc mcu has been improved by replacing micro - program with direct logic block
設計的riscmcu採用14位字長指令總線和8位字長數據總線分離的harvard結構和二級指令流水設計，並使用硬布線邏輯代替微程序控制，加快了微控制器的速度，提高了指令執行效率。 -
The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl
該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。 -
At implementation phase, based on the design policy, we first choose the language rose as msr language, analyzing the advantage of using the language rose. then we sort the lfb in msr according to the rose language specification, and particular define these five categories of lfb in rose language. in msr, we design forty kinds of lfb in all. finally, we especially list the design and implementation scheme of some important lfb, as the gre logic function block - - checkgreheader, greencap, stripgreheader and the logic function block for distribution operation - - splitfirst
在實現階段，根據設計方針，首先選擇rose作為msr的語言使用，分析了使用rose的好處。接著我們對msr中的lfb按照rose語言規范進行分類，並在rose語言中詳細定義這五類lfb 。使用rose語言描述邏輯功能模塊。 -
Researched the methods to test configrable logic block ( clb ) and its sub - blocks. based on a “ divide and conquer ” methodology, the clb resources are divided into three basic blocks : logic units, carry logic module ( clm ) and lut ’ s ( look up tables ) ram - mode. the testing configurations are implemented based on a two - dimensional array structure for logic blocks
主要基於「分治法」對clb及其子模塊進位邏輯（ clm ） 、查找表（ lut ）的ram工作模式等進行了測試劃分，分別實現了以「一維陣列」為基礎的測試配置和測試向量，以較少了測試編程次數完成了所有clb資源的測試。 -
Universal logic block
通用邏輯部件 -
Base on the analysis of comparison to current file systems, this thesis proposes new distributed network file system architecture on the tcp / ip protocol. the newly proposed file system is a three - layer architecture including clients, index servers and logic block servers
本文在分析現有的網路文件系統的基礎上，提出一種基於tcp ip的分散式網路文件系統結構，即以客戶端、索引服務器和邏輯塊服務器為基礎的三層結構。 -
Based on the whole chip function requirements, sub - block design and simulation were completed, including bandgap voltage reference, oscillator, slope compensation, current sensing, control and drive logic
在子電路的設計上，作者主要介紹了帶隙基準電壓源、振蕩器、斜坡補償、電流感應、控制和驅動邏輯。 -
The low level layer of the system is composed of hardware drivers and hardware logic block implementation. furthermore, software emulation about this system based on high level computer languages is also covered
最後緊跟現代軟體測試方法的發展步伐，對所編寫的軟體進行測試，以保證在功能、性能、健壯性等方面能獲得良好的結果。 -
As to the software, we firstly scheduled all of the test signal path between the computer and the uut, the output control logic between the digital i / o card and programmable relay key matrix, and used all of this to be the base of software design, then we introduce the block flow of software
在軟體設計部分首先規劃了所有測試信號在計算機主機與被測件之間的連接和傳輸路徑、數字i / o卡對可編程繼電器開關矩陣的輸出控制邏輯，作為軟體設計依據，隨后介紹了軟體的模塊化設計思想。 -
Block with errors in the logic to catch exceptions
塊時，編譯器將產生警告。 -
As the third section is related with foundation fieldbus, the characteristics, architecture and function block of it is expatiated in this section. in the third section, i discuss the disadvantages of using wire media as physical layer media in traditional fieldbus on the basis of the first two section, and present a solution of substituting wireless bluetooth ? for wire media. in this solution the bluetooth ? gateway is presented by integrating bluetooth ? and fieldbus, the data collected by bluetooth ? sensor is transported to ff hse fieldbus by bluetooth ? gateway, and the control logic of ff hse fieldbus is realized by the same bluetooth ? gateway
在這種有線介質替代解決方案中，將藍牙技術與現場總線技術相結合提出了藍牙網關的概念，現場藍牙傳感器採集的現場數據通過藍牙網關應用傳輸到ffhse現場總線上，同時ffhse現場總線上的控制邏輯也可以通過藍牙網關來實現，從而實現了無線藍牙網路與有線ffhse現場總線的互連，同時在該部分中還對藍牙網關應用的設計和實現進行了闡述。 -
With the model of " unit block analysis ", we try to explore the logic of city development from two aspects : spatial layout of city - land increment and the structure of each type of city - land in " unit block "
第四章是問題分析部分，基於區塊單元分析模型之上對杭州市城市發展用地增量的空間分佈分析和增量功能結構分析。 -
Each block of repeated code increases the chances of introducing an error into the logic
每一塊重復的代碼都使得程序邏輯中出現錯誤的幾率增加。 -
Finally, on the basis of the mpeg - 1 layer hencoding hardware structure, the block of logic communicates with the pc over the parallel port and the interface for flash memory are design. then a mpeg audio coding system, which applies to store audio signal, is presented through the field programmable gate array device technology
最後，在mpeg - 1層編碼的硬體結構的基礎上，結合計算機並口通信和flash存儲器的介面模塊，採用現場可編程邏輯器件fpga技術，最終設計了一種應用於音頻信號存儲的mpeg音頻編碼系統。
分享友人