logic family 中文意思是什麼

logic family 解釋
邏輯系列
  • logic : n. 1. 邏輯，理論學。2. 推理[方法]；邏輯性，條理性。3. 威力，壓力，強制（力）。
  • family : n 1 家，家庭；〈集合詞〉家庭成員，家屬，子女；親屬。2 氏族，家族，親族。3 〈美國〉閣員，（特指國...
  1. Each logic family has a " unit load expressed in milliamperes.

    各類邏輯電路都有一個用毫安表示的「單位負載。 」
  2. After the selection is made, the designer modifies his system digital circuit requirements to match the characteristics of the selected logic family.

    選擇好類型之後，設計人應該修改對系統數字電路的要求，以適應所選之邏輯電路參數。
  3. Each logic family has a "unit load expressed in milliamperes. "

    各類邏輯電路都有一個用毫安表示的「單位負載。」
  4. The target of this research project is to develop an 8 - bit risc microcontroller, which is compatible with picmicrotm mid - range mcu family of microchip technology inc. in the instruction system. the author and the team spent more than one year in this project. they abstracted logic schematic from layout, sorted the circuits into different modules, analyzed and simulated all the modules, and then they mastered the structure of mcu, understood the operation of instructions and grasped the design style of picmicro

    本文作者及其研究小組在一年多的時間里，從版圖的電路提取，電路整理，電路分析到電路的設計和模擬，做了大量的工作，深入的分析了pic16c73b的組成結構和工作原理，完全的破譯了picmicro的指令系統，把握了微控制器的設計思想，設計出了與pic中檔微控制器兼容的微控制器，為開發自我知識產權的微控制器奠定了堅實的基礎。
  5. Circuit design is the basis of design of demultiplexer. speed, power and chip area are the main factors that should be considered in circuit design. every circuit structure has its merits and drawbacks, e. g. cmos logic family has a slower speed, but lower power, smaller area, scfl ( source couple fet logic ) family has a higher speed, but higher power, larger area. we should choose a proper circuit structure or their mixed structure for certain design to get a good tradeoff among the three factors. flip - flop is the fundamental element of demultiplexer, setup time and hold up time are key factors, which influence the speed of circuit, thus the design aim is how to reduce them. in this thesis we place emphasis on the design of scfl latches

    速度、功耗、面積是電路設計要考慮的主要因素，不同的電路形式具有不同的優缺點，如cmos互補邏輯電路功耗低，面積小，速度相對較慢； scfl （源極耦合fet邏輯）電路速度高，功耗和面積較大。所以要針對具體設計需要選用適當的電路形式或其組合結構，以滿足設計要求。觸發器是分接器的基本組成單元，建立時間和保持時間是影響電路速度的關鍵，所以減小建立時間和保持時間是觸發器設計的主要目標，本文著重介紹了scfl鎖存器的設計和優化方法。
  6. Besides, it analyzes the social capital and networking function of kinship, discusses the interaction mechanism between the economic behavior of the family business and kinship among other social relations and argues the inevitable birth of the family business based on an socioeconomic logic

    進一步分析了親族關系的社會資本和網路功能；探討了家族經濟行為和自身親族等社會關系的互動機制，並從一個經濟社會學邏輯的角度回答了家族企業產生的必然。
  7. The complicated programmable logic devices adopted in our design belong to the flex6000 family of altera corporation

    設計中採用的cpld器件是altera公司的flex6000系列。
  8. Rsfq ( rapid - single - flux - quantum ) logic family is a new type of technology in superconducting digital circuits, in which the information is carried in the presence or absence of sfq voltage pulses generated by damped josephson junctions

    超導快單磁通量子rsfq （ rapidsinglefluxquantum ）電路是一種新型超導數字電子技術，它通過磁通量子化了的電壓脈沖的有、無，來表示二進制信息。
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