memory bus interface 中文意思是什麼

memory bus interface 解釋
存儲器總線介面
  • memory : n. 1. 記憶;記憶力;【自動化】存儲器;信息存儲方式;存儲量。2. 回憶。3. 紀念。4. 死後的名聲,遺芳。5. 追想得起的年限[范圍]。
  • bus : n (pl busses buses)1 公共馬車;公共汽車;客機。2 〈口語〉汽車,機器腳踏車;飛機。3 【電學】信息...
  • interface : n. 分界面,兩個獨立體系的相交處。vt. (-faced, -facing) 把界面縫合。vi. 交流,交談。
  1. This high - speed data acquisition card designed is based on pci bus and have high capacity memory interface. it combines high - speed date acquisition and high capacity real - time memory

    為此,本文設計了一款基於pci總線且具備可擴展大容量存儲設備介面的高速模擬信號採集卡,將高速數據採集和大容量實時存儲結合在一起。
  2. There are five parts in powerpc603e ? microprocessor : integer execution unit, floating point unit ( fpu ), instruction ( data ) cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way

    Powerpc603e微處理器系統由定點執行單元、浮點單元、指令(數據) cache 、總線介面單元、存儲管理單元組成,以流水和超標量方式執行指令。
  3. It has five parts, such as integer execution unit, floating point unit ( fpu ), instruction cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way. the instruction set and i / o signals are compatible with powerpc

    它由定點執行單元、浮點單元、指令cache 、總線介面單元、存儲管理單元組成,以流水和超標量方式執行指令,指令集和介面時序兼容powerpc ,是典型的risc微處理器結構。
  4. The work in this thesis was part of a national 05 " project which task was designing the " longtengrl " microprocessor. there are four parts in " longtengrl " microprocessor : integer execution unit ( ieu ), floating point unit ( fpu ), memory subsystem unit ( msu ) and bus interface unit ( biu )

    本論文完成存儲子系統單元的設計與實現、 「龍騰r1 」系統的集成、存儲子系統單元的驗證以及在「龍騰r1 」存儲子系統基礎上進行了tracecache的研究,其中重點討論存儲子系統的設計與實現。
  5. The dissertation implements acquisition data high speed transfer with pci bus dma technology and designs four group high speed streaming disk interface to expand high speed and high capacity memory and implement mass storage

    本文運用基於pci總線的dma技術實現了採集數據的高速傳輸,並通過設計4組高速流盤介面來外擴高速超大容量存儲器,實現了連續採集的海量存儲。
  6. Based on s698 technology, obt - devsys - s698 is one of the serial s698 - mil application development systems including 32 - bit embedded processor with 32 64 - bit fpu 160mhz processing speed sram memory controller flash memory controller uart ps 2 led interrupter controller, etc. the bus interfaces is composed of i2c spi magnetic card interface and ic card interface. obt - devsys - s698 carries on the advantages of s698 serial module such as compact structure and reasonable composition

    Obt - devsys - s698是s698系列嵌入式處理器開發板中的一員,其上包括:具有32 64 - bit浮點運算單元的32 - bit嵌入式處理器,主頻160mhz , sram存儲器, flash存儲器具有三路uart介面,一路ps 2介面, led發光二極體控制電路,中斷操作按鈕其外擴總線包括i2c總線介面spi總線介面磁卡介面智能卡介面等。
  7. To build up the hardware environment, we fully implement the amba ahb bus, memory interface and codec controller

    在外圍設備中,我們完整地實現了ambaahb總線規范,以及內存介面單元。
  8. The article introduces the architecture of tms320c32 and the special addressing of dsp, completes the interface circuits between dsp and memory, pci bus, ad converter

    本文介紹了ti公司的tms320c32的體系結構和dsp特有的尋址方式。完成了dsp與存儲器、 pci總線以及ad轉換器等的介面電路的設計。
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