parallel processor architecture 中文意思是什麼

parallel processor architecture 解釋
并行處理機結構
  • parallel : adj 1 平行的；并行的 （to; with）; 【電學】並聯的。2 同一方向的，同一目的的。3 相同的，同樣的，相...
  • processor : n. 1. 〈美國〉農產品加工者；進行初步分類的人。2. （數據等的）分理者；【自動化】信息處理機。
  • architecture : n. 1. 建築學。2. 建築（樣式、風格）；建築物。3. 構造，結構；【自動化】（電子計算機的）架構，體系結構。
  1. Investigation and analyzing has been made by the science and the industry for architecture of the network processor and network applications to testify the high benefits that could be brought by good combination of the logic of network application and the parallel infrastructure of the network processor, which confirms that the logical parallelization in network applications and the paralleled hardware structure of network processor are the promising basics for potential excavating of network hardware and developing of high quality network applications

    學術界和工業界致力於對網路處理器架構和網路應用程序二者各自的特性進行研究和分析，用以說明網路應用程序本身的邏輯特性和網路處理器的并行架構相得益彰。通過研究可以看出，網路應用程序本身的多個特性使其具有天然的可并行邏輯，這為充分挖掘其并行性和開發基於網路處理器的高質量高性能的應用程序奠定了基礎。再者，網路處理器專有的硬體架構為應用程序的并行執行提供了硬體基礎。
  2. This thesis mainly focuses on the multi - level parallelism development and performance optimization of scientific programs on this architecture, and our works are summarized as follows. ( 1 ) we put forward the multi - level parallel computing time model, which is suitable for smp cluster to analyze program performance from the micro - aspect. we also provide a multi - level parallel optimization speedup model based on the single - processor speedup factor, which can evaluate program performance from three parallel levels and guide us to improve the programs

    本文圍繞這種多級并行體系結構中的超節點級、節點級和單機指令級三個層次的并行性開發與優化，在科學計算程序的綜合優化技術研究方面做了以下的工作與創新: （ 1 ）針對smp集群體系結構提出了多級并行計算時間模型，用於程序性能的微觀分析;將單機處理速度與加速比統一起來，提出了基於單機優化加速因子的多級并行優化加速比評價模型，該模型分別從三個并行層次的角度出發對程序性能進行評價，並指導對程序的改進與優化。
  3. Finally, a new performance model of multi - dsp system architecture and task allocation and schedule is presented in virtue of distributed finite state machine ( dfsm ) and vhdl environment. chapter 1 gives a comprehensive description about the significance of research and the current research status of real - time dsp, parallel processing, fpga co - processor and vxi virtual instrument technology

    第?章緒論部分闡述了選題的意義，介紹了高性能信息處理領域內實時信號處理技術、并行處理技術、 fpga技術和vxi總線技術的研究與發展現狀，並介紹了課題提出的背景與主要研究內容與任務。
  4. So, we must design multimedia application - oriented computer architecture to fit the data processing demand of video compressing programs, we analyzed the parallelism of two representative video compressing programs - opendivx and tml9, and drew a conclusion that it is effective to run video compressing application programs on the processor which uses parallel arithmetic units

    相對于視頻壓縮應用而言，普通計算機的處理能力大大落後于處理需求。因此，對于多媒體應用，必須採用并行的方法來解決，但是不能簡單地使用普通并行機，必須針對這部分應用的特點，採用并行的思想來設計面向多媒體應用的計算機體系結構。
  5. Finally discusses several class different multi - dsp extended architecture based on vvp platform. chapter 3 analyzes the significance of dynamic reconfiguration of multi - dsp parallel processing system, introduce run - time reconfiguration technique of fpga. with comparison of the common used dynamic communication network in parallel processor system, proposes the new dynamic reconfigurable multi - dsp system architecture based on run - time reconfigurable fpga

    第三章分析了多dsp并行系統體系結構動態可重構的意義，介紹了fpga動態配置技術，比較了現有的一些多處理器動態互連的設計實現方法，在此基礎上，提出了利用局部動態重構fpga技術設計實現實時動態可重構多sharc功能系統的新方法。
  6. The main focus of this paper is to design a general - purposed embedded video digital signal processor. aimed at the general - purposed nature to different kinds of algorithms of this system, network architecture of parallel - processing multi - processors is studied, and the bottleneck problem of the system common bus is solved, thus establishing a detailed project of the system. to achieve the stability of the system, the signal integrity problem in the printed circuit board ( pcb ) is studied as its theoretical background, and the design rules of the high - speed circuit pcb are summarized, which have been applied in actual systems, and thus achieving good effects

    本文設計了一套通用的嵌入式視頻數字信號處理器：針對系統對多種演算法通用性要求研究了多處理器的并行處理網路結構，解決了該系統的總線瓶頸問題，並確定了系統的詳細設計方案；針對系統對穩定性要求，在理論上研究了印刷電路板中的信號完整性問題，總結了高速電路印刷電路板的設計規則，並在實際系統中獲得了應用，取得了很好的效果。
  7. First, we analyze the factors of image degradation, then we put our focus on the two situations : noise and block losses in transmission domain. meanwhile, we choose clusters of smp ( symmetric multi processor ) as our hardware architecture after contrast with other parallel computers

    在分析圖像退化原因的基礎上，把由噪聲引起的退化和基於塊編碼傳輸過程中的圖像退化問題作為主攻方向，同時分析了當今比較成熟的并行計算機體系結構smp機群，並討論了smpcluster上的演算法優化問題。
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