test timer 中文意思是什麼

test timer 解釋
測試定時器
  • test : n 1 檢驗,檢查;考查;測驗;考試;考驗。2 檢驗用品;試金石;【化學】試藥;(判斷的)標準。3 【化...
  • timer : n. 1. 時計,跑表。2. 記時員。3. 定時繼電器;程序調節器,定時(延遲)調節器,定時裝置,自動定時儀。4. (內燃機的)發火定時器。5. (汽車的)時速表。6. 按時計酬的工人。
  1. Abstract : in this paper, a principle and method of the speed pulse waveform sampling are introduced. its object is to study an effect of the turning factor on torbulence. test is done in the aerofoil fengwen. on design of the user interface, application of the timer and displaying way of a pape and continuity are specifically discussed. expermental results and analysis is showed at the last

    文摘:以翼型風洞為對象,著重介紹了變湍流度對翼型轉捩因子影響的速度脈動波形採集的原理和方法,重點對波形採集系統用戶界面的設計、定時器的應用、分頁顯示和連續顯示等技術進行了具體介紹,並給出了實驗結果及分析。
  2. This module will use multi - thread timer technologies and accomplish tasks as network elementon - off test, network elemnet ports status query, network element ports current rate gathering 。 the interaction between

    該模塊將用到多線程、定時器等多項技術,完成網元的通斷測試、網元埠狀態查詢、網元埠流量採集等任務。
  3. The paper generally narrates the development of next generation opitical network, gmpls technology and the function of lmp. then the paper descibes the system structure, design, realization and test, so provides a common method and flow of communication protocol. at last, the article particularly explain mtm ( message and timer manager ) technology whick realize the tamftimer action master )

    本論文概要講述了下一代光網的發展和gmpls技術,以及lmp協議功能作用,並詳細闡述了lmp系統的結構構建、設計、實現及測試,並且給出了實現一個通信協議的通用思想方法和流程。最後論文著重論述了lmp重要組成部分tam ( timeractionmaster )的核心mtm ( messageandtimermanager )的關鍵技術實現。
  4. Every timer has corresponding api. rtos - 1750 is charatered with tiny kernel, fast speed and consuming little resource, which meets the requirement of dcmp ofp and undergoing test in engineering application

    本文設計的rtos - 1750具有內核小、速度快、佔用資源少,滿足了dcmpofp軟體的需求,並在工程實踐中得到了應用。
  5. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進電機細分驅動系統,由數字控制模塊、驅動模塊和電源模塊組成,系統以at89c52單片機為核心,通過單片機的i o口、定時器計數器中斷來實現外部事件監控以及控制信號的產生,系統將可編程邏輯器件( pld )器件和在系統編程( isp )新技術引入到細分驅動環行分配器的設計,通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構,大大簡化了電路,並提高了電路抗干擾能力。使系統實現參數存儲,速度數字控制,數碼顯示,進退刀控制等功能。
  6. Test, reset and timer on - off control

    可做測試清除與計時器開啟關閉控制
  7. Input. determine inputs, such as thermocouple signals, timer, or analytical test results

    輸入。確定輸入,比如熱電偶信號,定時器,或分析測試結果。
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