數字鎖相環路 的英文怎麼說

中文拼音 [shǔzìsuǒxiānghuánlù]
數字鎖相環路 英文
digital phase-locked loop
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 鎖 : Ⅰ名詞1 （安在開合處使人不能隨便打開的器具） lock 2 （姓氏） a surname Ⅱ動詞1 （上鎖） lock up 2 ...
  • 相 : 相Ⅰ名詞1 （相貌; 外貌） looks; appearance 2 （坐、立等的姿態） bearing; posture 3 [物理學] （相位...
  • 環 : Ⅰ名詞1 （環子） ring; hoop 2 （環節） link 3 （姓氏） a surname Ⅱ動詞（圍繞） surround; encircle;...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  1. Monitor apparatus can measure valid value of three phase voltage and current, power factor, three phase disequilibrium, instant flecker of short time and harmonic without twenty, degree and harmonic distortion total. the paper are laid on the following. ( 1 ) master plan and function of circuit, ( 2 ) hardware design including circuit and principle of a / d conversion, phase lock, liquid crystal display and keystroke and so on, ( 3 ) design of system software including digital filtering, fft, a / d conversion and monitor interface of pc, ( 4 ) system test

    監測儀能夠完成包括三相電壓、三相電流的有效值、功率因數、三相不平衡、電壓短期閃變、以及20次內的諧波、諧波相位、諧波失真總量等的測量。論文重點介紹了以下幾部分： （ 1 ）電路的總體設計和功能； （ 2 ）硬體設計，包括a d轉換、鎖相環、液晶顯示和按鍵輸入等原理和電路。 （ 3 ）系統軟體設計，包括a d轉換、 fft 、數字濾波等程序的原理和演算法以及上位機監控界面的設計； （ 4 ）系統測試。
  2. In this thesis, firstly, we put forward a new algorithm of the synchronization of carrier reference phase, that is to use the curve synthesizing with the general digital carrier phase looper to have an estimation on carrier frequency within 10 ms so as to meet the need of meteor burst communication. we have done some simulations to get the performance of carrier frequency estimation using two modulation modes ( 16qam and 4 - qpsk ), and had some test on the carrier phase looper in conditions when using different baud rate transmission and when the baud tuning have windage

    我們對兩種正交調制方式（ 16qam和4 - qpsk ）進行了模擬工作並給出了模擬結果，同時討論了碼元同步定時誤差對鎖相環路工作的影響並根據流星通信中使用變速率傳輸時鎖相環路的載波同步性能進行了測試；然後在基於軟體無線電思想的數字處理平臺（該數字處理平臺實現了中頻數字化）上用dsp軟體完成了載波的相位跟蹤。
  3. For digital audio encoding and decoding modules, delta - sigma modulation is introduced and audio data, preambles with accessorial data are multiplexed according to the digital audio interface standard ; for carrier wave, pll frequency synthesizer is used ; for frequency modulation, voltage control oscillator is taken ; for demodulation, pll frequency discrimination is adopted

    調制方式，並按照數字音頻介面標準對音頻數據、同步字和附加信息進行通道復用;對于載波信號，採取鎖相環頻率合成技術手段;對于頻率調制，採用壓控振蕩器;對于解調電路，採取鎖相環鑒頻電路。
  4. Since commercial pll ic came out, phase - locked - loop frequency synthesis has become widely accepted. but when narrow frequency - step is required, the loop bandwidth has to decrease while cannot meet the demand of frequency - hopping speed

    數字鎖相集成器件出現以來，鎖相式頻率合成器得到迅速發展，但是當需要窄頻率步進時，環路帶寬需要降低，致使鎖定時間變長，不能滿足快速跳頻的要求。
  5. Then we uses the scheme that has the variable gain based on the kalman filtering model realize two steps phase - locks ring circuit track technology, this kind has the advantage that when changed the gain the digital phase - lock link to be allowed simultaneously to realize the fast capture and the reliable track, the simulation analyzes its capture performance

    模擬結果表明，自編碼直擴通信系統的編碼捕獲性能具有可行性。採用基於卡爾曼濾波模型實現具有可變增益的二階鎖相環路的跟蹤技術，這種具有時變增益的數字鎖相環可以同時實現快速捕獲和可靠跟蹤，其捕獲性能要比傳統數字鎖相環改善很多。
  6. Through the research of direct digital synthesizer ( dds ) used as a divider in phase lock loop ( pll ), a frequency synthesizer with small frequency resolution ratio and high purity frequency spectrum can be realized

    摘要通過對直接數字合成器在鎖相環路中作為分頻器應用的研究，使頻率合成器可以在實現超細頻率解析度的同時達到高的頻譜純度。
  7. We design inversion control circuit with cmos figure pll cd4046 act as core and microprocessor 80c196kc act as assistant controller. adopting a control method that combine fuzzy controller and pll control, improve induction heating power succeed in startup. adopting electric current voltage pair closed loop feedback design, with trough route capacitance voltage and trough route electric current act as pair closed loop feedback signal, guarantee induction heating power output accuracy

    並對系統主電路的元器件參數進行了詳細的計算；設計了以cmos數字鎖相環cd4046為核心、以80c196kc作為輔助控制器的逆變控制電路；採用了模糊邏輯與鎖相環相結合的控制技術，提高了電源的啟動成功率；採用電流、電壓雙閉環反饋方案，採用槽路電容電壓和槽路電流作為反饋信號，從而保證了電源功率的輸出精度。
  8. In this paper, a pll frequency synthesizer working in l band is researched. at fist, we review the basic of phase lock loop and it ' s constituent part. after that the basic conception and design method of pll frequency synthesizer was introduced, especially introduced the charge pump pll frequency synthesizer in detail

    本文是採用鎖相原理設計的l波段頻率合成器，首先對鎖相環路的工作原理和基本組成部分進行了簡單的介紹，然後介紹了鎖相頻率合成器的原理和設計方法，主要介紹了目前小型頻率合成器產品中使用最廣泛的由電荷泵數字鑒頻鑒相器和無源環路濾波器構成的頻率合成器。
  9. Then according to the emphasis of the design, went deeply into the theory of pll frequency synthesizers widely used, described pll ’ s working principle, structure and several types in detail, and made research and analysis of pll frequency synthesizers ’ phase noise, including the effect of the active loop filter on the phase noise, and give some methods to make improvement as well, such as changing loop filter form, reducing divide number, and increase phase detector frequency, etc. then paper introduced the principle character and phase noise analysis of direct digital frequency synthesizer ( dds ) and injection phase lock circuit, which are also important circuits in the design

    論文首先對幾十年頻率合成器的發展進行概述，而後針對本次設計的重點，對應用較為廣泛的鎖相頻率合成理論進行了深入的探討，詳細介紹了鎖相環的工作原理、組成結構和鎖相類型，並對鎖相頻率合成器的相噪特性進行了研究分析，包括有源環路濾波器對于相噪的影響，提出了改善相位噪聲的幾點措施:改善環路形式、降低分頻數、增大鑒相頻率等。接著介紹了直接數字頻率合成器（ dds ）和注入鎖相電路的原理特點以及相噪分析，它們也是本次設計的重要電路。
  10. Based on the theory of dpll, line phase locked and color subcarrier regeneration were designed

    依據數字鎖相環的基本原理，完成了行鎖相、色副載波還原電路的設計。
  11. We design the digital phase - locked loop applying the method designing digital circuitry from the top down. we design the circuitry by the vhdl in the maxpulsii software environment. we validate the circuitry function in the emulator

    採用自頂向下的數字電路設計方法設計全數字鎖相環路，在maxplusii設計環境下採用vhdl語言、 ahdl語言等設計實現數字鎖相環，並通過計算機模擬證實其正確性。
  12. At last we introduce the realization of all the parts, the problem in the circuit design and the measured data. the results show that the designed system has met the requirement. in this dissertation, direct digital synthesis technology has been used in the phase - locked frequency synthesizer, which can make full use of the characteristics of direct digital synthesis technology such as flexible output wave shape and continuous

    本課題將直接數字式合成技術用於鎖相頻率合成器中，該方法將直接數字合成的特點，如輸出波形靈活且相位連續、頻率穩定度高、輸出頻率解析度高、頻率轉換速度快、輸出相位噪聲低、集成度高、功耗低、體積小等與鎖相環路的頻帶寬、工作頻率高、頻譜質量好等優點有機的結合起來，從而在寬帶的條件下實現了比較好的雜散性能和相噪。
  13. Then a composite control approach was brought forward which combined wave neural networks ( wnn ) with digital phase locked - loop ( dpll ) to improve performances of induction heating. simulation results show that the means is effective and feasible. the main works done by author are as follows : 1

    針對感應加熱電源的控制問題，在保留鎖相環控制的基礎上，將小波網路控制和數字式鎖相環控制相結合，實現了對感應加熱電源的復合控制，模擬結果表明了該方法的有效性和可行性。
  14. Based on above - mentioned schemes, the power detection system based on tms320vc5410 is designed, which realizes collection, a / d, digital signal processing. keyboard. display and uart ? the ad73360 gather chip commonly used in power system is used in front of the power detection system, and the circuit of frequency multiplication phase - locked is consisted of phase - locked loop device ? d4046 and frequency division device cd4060 to produce the gather signal of ad73360 frequently, the gather wave and re sult can be displayed on lcd

    基於上述方案，本人設計開發了基於tms320vc5410的電力採集檢測系統。基本實現了採集、 a d轉換、數字信號處理、鍵盤顯示、異步通信等系統軟硬體設計。該系統前端採用電力系統常用的ad73360採集晶元，鎖相倍頻電路由鎖相環cd4046與分頻器cd4060一起構成，產生ad73360採集觸發信號。
  15. In the course of the design, critical technologies are applied, such as digital phase - locked loop, fast fourier transform algorithm, universal asynchronous receiver & transmitter, and so on. in the project, as a important component, the module of monitoring the buses " power quality takes a long time

    在設計過程中，使用的關鍵技術有：使用cpld模擬多路sspc多種狀態；在對匯流條電能質量的監測過程中採用頻率跟蹤技術? ?全數字鎖相環；應用fpga技術使用fft運算進行諧波分析；通用異步收發器等技術。
  16. An idea is brought forth to design the total structure of the usb interface ip, the main control logic, the mcu interface ( the function is the same as the pdiusbd12 chip of the philips semiconductor ) and a dpll which is used to synchronize data and separate the clock. this paper also introduces packet recognition, transaction sequencing, sop, eop, reset, resume signal detection / generation, nrzi data encoding / decoding and bit - stuffing, crc generation and checking ( token and data ), packet id ( pid ) generation and checking / decoding,

    提出設計了usb介面電路的整體構架，設計了usb的主要控制邏輯和與mcu的互連的介面（此介面與飛利普的usb介面晶元pdiusbd12兼容） ，也設計了一個數字鎖相環（ dpll ）來同步數據和分離時鐘，並對同步模式的識別、并行/串列轉換、位填充/解除填充、 crc校驗/產生、 pid校驗/產生、地址識別和握手評估/產生做了具體的分析。
  17. On the basis of our lab ' s previous achievements, the author has studied three kinds of digital signal processing methods - the method based on a digital phase locked loop, the method based on quadrature demodulation, and the method based on adaptive funnel filter ( aff ) and sliding goertzel algo rithm ( sga ). the author has also studied the cmf driving principle, various analog driving circuits, driving waves, and digital driving methods

    主要研究了三種科氏流量計的數字信號處理方法：基於數字鎖相環的方法、基於正交解調的方法和基於自適應funnel濾波器和滑動goertzel演算法的方法；以及科氏流量計驅動的原理、各種模擬驅動的波形、電路以及數字驅動的方法等。
  18. On the promise of holding the control means of pll, introducing the control ways of wnn optimized by immune algorithms into the control of induction heating power, the author brought forward a multiple control strategies, that is, combined a wave neural networks which optimized by means of immune algorithms with digital phase locked loop circuit. simulation results show that it is feasible and effective

    在保留鎖相環控制的基礎上，引入了基於免疫優化的小波神經網路，提出了把小波網路控制和數字鎖相環控制相結合的控制策略，並以感應加熱電源為控制對象，模擬結果表明了該控制策略的有效性與可行性。
  19. The fourth, mainly talk about the phase noise in the pll, and discuss the specific affect on out put phase noise caused by different components in frequency synthesizer, such as mixer, amplifier, multipler, divider, oscillator, phase detector etc. the last part is about how to choice the natural frequency of pll in order to get the better performance in phase noise

    第二章從鎖相環的基本原理出發，介紹了鎖相環的幾個基本部件:鑒相器?環路濾波器和壓控振蕩器，對線性化鎖相環進行了詳細的分析，對數字鎖相環做了詳細的介紹，分析了鎖相環的相位噪聲模型，討論了頻綜中的混頻器
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