時鐘位 的英文怎麼說

中文拼音 [shízhōngwèi]
時鐘位 英文
clock bit
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 位 : Ⅰ名詞1 （所在或所佔的地方） place; location 2 （職位; 地位） position; post; status 3 （特指皇帝...
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  1. In this paper, it is shown that some atomic formulas of symbolic states generated by the algorithms can be removed to improve the model checking time - and space - efficiency. such atomic formulas are called as irrelevant atomic formulas. a method is also presented to detect irrelevant formulas based on the test - reset information about clock variables

    一個時間自動機是一個五元組n ， l 0 ， c ， e ， i ，其中n為一個有窮的位置集合， l 0n是初始狀態， c是一個取實數值的時鐘變量的有窮集合， e ng c 2 cn是轉換的集合。
  2. To eliminate the bootless power dissipation of the redundant transition of the clock, a design method named det ( double - edge - triggered ) shift register is proposed

    摘要從消除時鐘信號冗餘跳變而致的無效功耗的要求出發，提出雙邊沿移位寄存器的設計思想。
  3. Then, we propose a design method named det ( double - edge - triggered ) shift register to eliminate the bootless power dissipation of the redundant transition of the clock

    接著，從消除時鐘信號冗餘跳變而致的無效功耗的要求出發，提出雙邊沿移位寄存器的設計思想。
  4. Some message described in the thesis, such as the basic structure of gps - oem, the consists of positioning system, the binary format of almanac and ephemeris, the method and the skill of processing orignal data through singlechip, and so on, is very useful for studying gps and its applications in integrated navigation, and re - development on gps - oem

    同時亦可與gis （地理信息系統）配套使用，實現在crt上地圖背景下的運動軌跡顯示。第二個產品， gps時鐘/同步系統，利用全球衛星定位gps衛星的標準utc時間，可在全球得到同步的準確時間。設備採用motorola的12通道gpsoem接收機。
  5. Each bit can flip 1020 times per second, equivalent to a clock speed of 100 giga - gigahertz

    每個位元每秒可翻轉1020次，大約比振?頻率10億赫茲的時鐘快1000億倍。
  6. Going in the other direction, an intel p4 or amd athlon running at clock speeds over a gigahertz should be able to satisfy the requirements of a 45 megabit t3 line

    另一方面，以超過1ghz的時鐘速度運行的intel p4或amd athlon應該能夠滿足一條45兆位t3線路的需求。
  7. Se fossi in te if i were you lora di religione - il sorriso di mia madre the religion hour my mother s smile

    如果我是你宗教時鐘我母親的微笑靈魂的位置
  8. The second parameter specifies the rate of the pixel clock in megahertz

    第2個參數指定的是像素時鐘頻率（單位為mhz ） 。
  9. Dozens of the top clock makers in the world convened in new orleans one muggy week this past may to present their latest inventions

    2002年5月一個悶熱的星期，數十位世界頂尖的時鐘製造者齊聚美國新奧爾良，展示他們的最新發明。
  10. Electric - controller is nubbin in developping. we are based on designing to structure of circuit, we are dead against in time and stabilization for controlling and communications, precision and rapidity for transformation etc. we have completed to select on microprocessor, clock - frequency and a / d transfer. it carry out transformation for valve position signal, and select on solid - switch ac

    在控制器的電路結構設計的基礎上，考慮到通訊、控制的及時、穩定、轉換的精度和速度等幾方面，主要完成對微處理器的選擇、時鐘頻率和a d轉換器的選用，閥位變送功能的實現，固態交流開關和顯示器的選擇等。
  11. Should an accident occur then their location can be pin pointed in a matter of seconds

    事故發生當時的位置應該可以在幾秒鐘內提彬
  12. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  13. Thirdly, the paper discusses the driver of the peripheral equipment, how to port the uc / os - n and uclinux, h. 323 protocol and the application of the system in the digital speech classroom. also some software and hardware measure are adopted to enhance the system stability. at last, the shortcoming and the something to be improved are given. dsp can be used to realize real - time speech coding algorithm, and after porting ( ac / os - n, arm can manage the keyboard, the lcd and the ethernet peripheral etc. then the embedded network system with specific purpose can be used in others fields, such as pda, set of top, web tv, ect

    在實際設計實現中，為提高系統軟、硬體整體穩定性和可靠性，使用了以下幾種方法： （ 1 ）低電壓復位、抗電源抖動能力、增加時鐘監測電路、抗電磁干擾能力、散熱等技術； （ 2 ）多層pcb設計，線路板結構緊湊，電源部分採用數字5v 、 3 . 3v 、 3v 、 1 . 8v和模擬5v多電源供電； （ 3 ）選用表面貼和bga封裝的器件； （ 4 ）按照軟體工程的要求進行系統分析，規劃系統框圖、流程分析、模塊劃分，減小了不同模塊的相關性，從而最大限度避免了錯誤的發生。
  14. The analog signals are regulated to satisfy the system and analog - to - digital converter ( adc ) ; dsp is the core part and is connected with adcs, a controller of ethernet, a rs - 485 bus transceiver, a can bus transceiver and a clock. the real - time data is disposed by dsp and is transferred to the upper computer when the alarm is happened

    模擬信號調理模塊對輸入的信號進行調理，以達到系統和模數轉換器（ adc ）采樣的要求; dsp作為系統的核心部件，外擴了adc 、以太網控制器、 rs - 485總線收發器、 can總線收發器和時鐘晶元， dsp對實時數據進行處理，當報警發生時將實時數據通過以太網上傳給上位機。
  15. The field of video signal processing is now undergoing a digital reform. the digital processing technique is clearly expatiated in this paper, such as a / d convert, anti - alias filter, clamp control, gain control, pll, synchronization circuit, color decoder, comb filters

    本文詳細敘述了視頻圖像的數字處理方法，重點介紹了視頻信號數字化技術、抗混疊濾波器、箝位、增益控制、鎖相技術、同步時鐘產生、電視信號亮色分離、彩色解碼等技術，這些關鍵技術為視頻信號的數字化處理提供了重要的基礎。
  16. In this paper, a clock recovery system that based on phase control technology is studied

    本文設計的鎖相環路是基於相位控制技術的時鐘恢復系統。
  17. Abstract : a new clock - driven eco placement algorithm is presented for standard - cell layout design based on the table - lookup delay model. it considers useful clock skew information in the placement stage. it also modifies the positions of cells locally to make better preparation for the clock routing. experimental results show that with little influence to other circuit performance, the algorithm can improve permissible skew range distribution evidently

    文摘:提出了一種新的時鐘性能驅動的增量式布局演算法，它針對目前工業界較為流行的標準單元布局，應用查找表模型來計算延遲.由於在布局階段較早地考慮到時鐘信息，可以通過調整單元位置，更有利於后續的有用偏差時鐘布線和偏差優化問題.來自於工業界的測試用例結果表明，該演算法可以有效地改善合理偏差范圍的分佈，而對電路的其它性能影響很小
  18. Then we turned in the input laser to observe the decline of phase conjugate reflectivity. measuring dark storage time, we found that the phase conjugate reflectivity declined to 50 % of steady - state value when photorefractive crystal was in dark condition for 30 minutes. even after 9 hours, there still existed remaining reflectivity, which could n ' t be measured by our detector

    因而研究了晶體內位相共軛光柵存儲特性，即觀察位相共軛光柵形成后在黑暗條件下能存儲的時間，實驗結果得出位相共軛光柵在黑暗中30分鐘后，位相共軛反射率下降到原來的50 ，而在黑暗中9小時后，位相共軛光非常微弱，無法測出。
  19. Gps is a planet wireless conductance system which is global and all - weather, gps can offer high precision time orientation information to infinite user, clock precision reachs 10 ? 6 magnitude 。 not only changes traditional time method of quartz crystal clock, but also replaces wireless shortwave and even more lowfrequency signal and tv signal whose overlay range is limited and low precision, offers advantage to geology field task, achieve automatization and high precision of seismic flow observation

    利用gps授時信號全方位、全天候、連續性、實時性和高精度的特點，以gps信號為基準來校準本地時鐘（晶體振蕩時鐘或原子鐘） ，將gps接收機輸出信號的長期穩定度和恆溫晶振的短期穩定度相結合，應用大規模可編程邏輯器件，設計和實現了由pc104控制的實時在線授時系統。
  20. The third, the whole circuit of digital cmos image sensor is presented. the circuits of pixel array, clock signal generator and sam have been improved on the base of simulation

    再次，我們對整個cmos數字圖像傳感器進行了電路設計，主要包括：時鐘信號發生器，順序移位寄存器和像素陣列。
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